MX2017013365A - Sistema de convertidor analogico a digital. - Google Patents
Sistema de convertidor analogico a digital.Info
- Publication number
- MX2017013365A MX2017013365A MX2017013365A MX2017013365A MX2017013365A MX 2017013365 A MX2017013365 A MX 2017013365A MX 2017013365 A MX2017013365 A MX 2017013365A MX 2017013365 A MX2017013365 A MX 2017013365A MX 2017013365 A MX2017013365 A MX 2017013365A
- Authority
- MX
- Mexico
- Prior art keywords
- adc
- digital
- signal
- analog
- array
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1033—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
- H03M1/1038—Calibration over the full range of the converter, e.g. for correcting differential non-linearity by storing corrected or correction values in one or more digital look-up tables
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1004—Calibration or testing without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
- H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing
Abstract
Se provee un sistema de convertidor de analógico a digital (ADC) intercalado en el tiempo que comprende un puerto de entrada configurado para recibir una señal analógica, una matriz de ADC que comprende M, M=2, ADCs dispuestos en paralelo. Cada ADC está configurado para recibir y convertir una porción de la señal analógica a una señal digital a una tasa de muestreo fs. El sistema ADC comprende además un ADC de referencia configurado para recibir y para convertir la señal analógica en una señal digital de referencia a una tasa de muestreo promedio fref inferior a fs. Cada instante de muestreo del ADC de referencia corresponde a un instante de muestreo de un ADC en la matriz de ADCs, y el ADC para seleccionar para cada instante de muestreo de ADC de referencia es aleatorizado en el tiempo. El sistema ADC también comprende un módulo de corrección configurado para ajustar las salidas de señal digital de la matriz de ADC a una señal de salida digital corregida con base en muestras de la señal digital de referencia y las señales digitales de los correspondientes ADCs seleccionados. También se provee un método para la conversión de analógico a digital intercalado en el tiempo.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/EP2015/062036 WO2016192763A1 (en) | 2015-05-29 | 2015-05-29 | Analog-to-digital converter system |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2017013365A true MX2017013365A (es) | 2017-12-07 |
Family
ID=53269496
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2017013365A MX2017013365A (es) | 2015-05-29 | 2015-05-29 | Sistema de convertidor analogico a digital. |
Country Status (8)
Country | Link |
---|---|
US (1) | US10833693B2 (es) |
EP (1) | EP3304744A1 (es) |
JP (1) | JP6612898B2 (es) |
CN (1) | CN107636971B (es) |
HK (1) | HK1244113A1 (es) |
MX (1) | MX2017013365A (es) |
WO (1) | WO2016192763A1 (es) |
ZA (1) | ZA201706984B (es) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3418760B1 (en) * | 2017-06-22 | 2020-08-26 | IHP GmbH - Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik | Method and system for oversampling a waveform with variable oversampling factor |
CN111512557B (zh) * | 2017-12-22 | 2023-11-03 | 瑞典爱立信有限公司 | 时间交错模数转换器 |
EP3579419B1 (en) * | 2018-06-08 | 2021-09-15 | Nxp B.V. | Apparatus for determining calibration values of an adc |
US10735115B2 (en) * | 2018-07-31 | 2020-08-04 | Nxp B.V. | Method and system to enhance accuracy and resolution of system integrated scope using calibration data |
CN109379080A (zh) * | 2018-09-21 | 2019-02-22 | 电子科技大学 | 用于时间交替采样的时间误差自适应消除方法 |
WO2020068123A1 (en) * | 2018-09-28 | 2020-04-02 | Intel Corporation | Analog-to-digital conversion |
CN110971233B (zh) * | 2019-11-04 | 2023-06-06 | 西安电子科技大学 | 一种时域交织adc多相时钟产生电路 |
CN111049522B (zh) * | 2019-12-20 | 2023-12-22 | 西安电子科技大学 | 基于伪随机码的随机化通道校准方法和系统 |
CN111130648B (zh) * | 2019-12-31 | 2021-06-08 | 中国科学院微电子研究所 | 一种光通信信号接收方法、信号接收装置和电子设备 |
CN111224671A (zh) * | 2020-01-15 | 2020-06-02 | 高跃 | 信号处理设备 |
US11038516B1 (en) * | 2020-05-29 | 2021-06-15 | Intel Corporation | Apparatus and method for analog-to-digital conversion |
US11558065B2 (en) * | 2021-01-26 | 2023-01-17 | Nxp B.V. | Reconfigurable analog to digital converter (ADC) |
US11658670B2 (en) * | 2021-01-28 | 2023-05-23 | Avago Technologies International Sales Pte. Limited | System and method of digital to analog conversion adaptive error cancelling |
CN115425972B (zh) * | 2022-08-31 | 2023-06-02 | 集益威半导体(上海)有限公司 | 高速级联模数转换器电路的误差校准电路 |
CN117200790B (zh) * | 2023-09-22 | 2024-04-12 | 扬州宇安电子科技股份有限公司 | 一种交织采样系统的杂散抑制方法、装置及系统 |
Family Cites Families (23)
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JPH04172274A (ja) * | 1990-11-06 | 1992-06-19 | Hitachi Ltd | アナログ・ディジタル混在集積回路及びその試験方法並びに通信機器及びビデオ信号処理機器及び計測機器 |
SE516156C2 (sv) * | 1999-06-23 | 2001-11-26 | Ericsson Telefon Ab L M | En parallell analog-till-digitalomvandlare och ett förfarande för att omvandla analoga värden till digitala i parallella, oberoende av varandra utförda processer |
JP2001208804A (ja) | 2000-01-25 | 2001-08-03 | Hitachi Ltd | 半導体集積回路装置 |
JP2001308804A (ja) * | 2000-04-27 | 2001-11-02 | Agilent Technologies Japan Ltd | 冗長性をもったインターリーブ方法と、それを利用したa/d変換器と、d/a変換器、トラック・ホールド回路 |
ATE330367T1 (de) | 2002-09-17 | 2006-07-15 | Siemens Mobile Comm Spa | Offsetspannungskompensationsverfahren für parallele zeitverschachtelte analog- digitalwandler sowie schaltung dafür |
EP1729420B1 (en) * | 2005-01-11 | 2008-05-14 | Anritsu Corporation | Analog-to-digital converter device of improved time interleaving type, and high-speed signal processing system using the device |
US7138933B2 (en) * | 2005-04-26 | 2006-11-21 | Analog Devices, Inc. | Time-interleaved signal converter systems with reduced timing skews |
JP5189828B2 (ja) * | 2007-11-20 | 2013-04-24 | 株式会社日立製作所 | アナログデジタル変換器チップおよびそれを用いたrf−icチップ |
US7777660B2 (en) * | 2008-09-09 | 2010-08-17 | Mediatek Inc. | Multi-channel sampling system and method |
JP5288003B2 (ja) * | 2009-12-11 | 2013-09-11 | 日本電気株式会社 | A/d変換装置とその補正制御方法 |
US8519875B2 (en) * | 2011-04-12 | 2013-08-27 | Maxim Integrated Products, Inc. | System and method for background calibration of time interleaved analog to digital converters |
CN102332920A (zh) * | 2011-07-18 | 2012-01-25 | 复旦大学 | 一种高sfdr多通道时间交错逐次逼近型模数转换器 |
CN102497210B (zh) * | 2011-11-30 | 2013-12-11 | 电子科技大学 | 一种多adc数据采集系统的数据同步识别装置 |
CN102571034B (zh) * | 2011-12-30 | 2015-04-22 | 北京邮电大学 | 基于随机循环矩阵的模拟压缩感知采样方法及系统 |
JP5836493B2 (ja) * | 2012-09-07 | 2015-12-24 | 株式会社日立製作所 | インターリーブa/d変換器 |
US8890739B2 (en) * | 2012-12-05 | 2014-11-18 | Crest Semiconductors, Inc. | Time interleaving analog-to-digital converter |
US9143149B1 (en) * | 2014-04-01 | 2015-09-22 | Entropic Communications, LLC. | Method and apparatus for calibration of a time interleaved ADC |
US9287889B2 (en) * | 2014-04-17 | 2016-03-15 | The Board Of Regents, The University Of Texas System | System and method for dynamic path-mismatch equalization in time-interleaved ADC |
CN104467842A (zh) * | 2014-11-03 | 2015-03-25 | 合肥工业大学 | 一种带参考通道的tiadc的数字后台实时补偿方法 |
US9294112B1 (en) * | 2014-11-13 | 2016-03-22 | Analog Devices, Inc. | Methods and systems for reducing order-dependent mismatch errors in time-interleaved analog-to-digital converters |
US9401726B2 (en) * | 2014-11-26 | 2016-07-26 | Silicon Laboratories Inc. | Background calibration of time-interleaved analog-to-digital converters |
US9503116B2 (en) * | 2014-12-17 | 2016-11-22 | Analog Devices, Inc. | Efficient calibration of errors in multi-stage analog-to-digital converter |
US10057048B2 (en) * | 2016-07-19 | 2018-08-21 | Analog Devices, Inc. | Data handoff between randomized clock domain to fixed clock domain |
-
2015
- 2015-05-29 JP JP2017561944A patent/JP6612898B2/ja active Active
- 2015-05-29 EP EP15725355.0A patent/EP3304744A1/en not_active Withdrawn
- 2015-05-29 WO PCT/EP2015/062036 patent/WO2016192763A1/en active Application Filing
- 2015-05-29 CN CN201580080501.8A patent/CN107636971B/zh active Active
- 2015-05-29 MX MX2017013365A patent/MX2017013365A/es active IP Right Grant
- 2015-05-29 US US15/563,963 patent/US10833693B2/en active Active
-
2017
- 2017-10-16 ZA ZA2017/06984A patent/ZA201706984B/en unknown
-
2018
- 2018-03-13 HK HK18103469.6A patent/HK1244113A1/zh unknown
Also Published As
Publication number | Publication date |
---|---|
CN107636971A (zh) | 2018-01-26 |
ZA201706984B (en) | 2019-02-27 |
US10833693B2 (en) | 2020-11-10 |
JP6612898B2 (ja) | 2019-11-27 |
WO2016192763A1 (en) | 2016-12-08 |
JP2018520582A (ja) | 2018-07-26 |
US20180138919A1 (en) | 2018-05-17 |
HK1244113A1 (zh) | 2018-07-27 |
EP3304744A1 (en) | 2018-04-11 |
CN107636971B (zh) | 2022-03-01 |
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