MX2016003559A - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents
Dispositivo de procesamiento de datos y metodo de procesamiento de datos.Info
- Publication number
- MX2016003559A MX2016003559A MX2016003559A MX2016003559A MX2016003559A MX 2016003559 A MX2016003559 A MX 2016003559A MX 2016003559 A MX2016003559 A MX 2016003559A MX 2016003559 A MX2016003559 A MX 2016003559A MX 2016003559 A MX2016003559 A MX 2016003559A
- Authority
- MX
- Mexico
- Prior art keywords
- data processing
- group
- ldpc code
- code
- processing device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/253—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Error Detection And Correction (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013199082 | 2013-09-26 | ||
PCT/JP2014/074193 WO2015045894A1 (fr) | 2013-09-26 | 2014-09-12 | Dispositif et procédé de traitement de données |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2016003559A true MX2016003559A (es) | 2016-07-21 |
Family
ID=52743036
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016003559A MX2016003559A (es) | 2013-09-26 | 2014-09-12 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPWO2015045894A1 (fr) |
KR (1) | KR20160064092A (fr) |
CN (1) | CN105580280A (fr) |
CA (1) | CA2924874A1 (fr) |
MX (1) | MX2016003559A (fr) |
WO (1) | WO2015045894A1 (fr) |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3875693B2 (ja) * | 2004-03-24 | 2007-01-31 | 株式会社東芝 | Lpc符号を用いた符号化ビットのマッピング方法及び送信装置 |
US7543197B2 (en) * | 2004-12-22 | 2009-06-02 | Qualcomm Incorporated | Pruned bit-reversal interleaver |
KR101042747B1 (ko) * | 2005-06-21 | 2011-06-20 | 삼성전자주식회사 | 구조적 저밀도 패리티 검사 부호를 사용하는 통신시스템에서 데이터 송수신 장치 및 방법 |
CN100589564C (zh) * | 2006-04-18 | 2010-02-10 | 华为技术有限公司 | 一种手持电视系统中的信道交织方法及系统 |
EP2134051A1 (fr) * | 2008-06-13 | 2009-12-16 | THOMSON Licensing | Schéma de transmission QAM adaptatif pour améliorer la performance sur un canal AWGN |
JP5630278B2 (ja) * | 2010-12-28 | 2014-11-26 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
JP5664919B2 (ja) * | 2011-06-15 | 2015-02-04 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
-
2014
- 2014-09-12 MX MX2016003559A patent/MX2016003559A/es unknown
- 2014-09-12 KR KR1020167006873A patent/KR20160064092A/ko not_active Application Discontinuation
- 2014-09-12 JP JP2015539098A patent/JPWO2015045894A1/ja not_active Abandoned
- 2014-09-12 WO PCT/JP2014/074193 patent/WO2015045894A1/fr active Application Filing
- 2014-09-12 CA CA2924874A patent/CA2924874A1/fr not_active Abandoned
- 2014-09-12 CN CN201480051399.4A patent/CN105580280A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
CN105580280A (zh) | 2016-05-11 |
KR20160064092A (ko) | 2016-06-07 |
WO2015045894A1 (fr) | 2015-04-02 |
JPWO2015045894A1 (ja) | 2017-03-09 |
CA2924874A1 (fr) | 2015-04-02 |
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