MX369906B - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents
Dispositivo de procesamiento de datos y metodo de procesamiento de datos.Info
- Publication number
- MX369906B MX369906B MX2016014888A MX2016014888A MX369906B MX 369906 B MX369906 B MX 369906B MX 2016014888 A MX2016014888 A MX 2016014888A MX 2016014888 A MX2016014888 A MX 2016014888A MX 369906 B MX369906 B MX 369906B
- Authority
- MX
- Mexico
- Prior art keywords
- data
- group
- ldpc code
- code
- processing device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2757—Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
- H04L1/0058—Block-coded modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Computer Networks & Wireless Communication (AREA)
- Mathematical Physics (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Multimedia (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
La tecnología presente se refiere a un dispositivo de procesamiento de datos y un método de procesamiento de datos, los cuales son capaces de asegurar la calidad de comunicación excelente en la transmisión de datos usando un código LDPC. En el intercalado de formación de grupos, un código LDPC en el cual una longitud N de código es 16200 bits y una tasa r de codificación es de 6/15, 8/15, o 10/15 es intercalado en unidades de los grupos de bits de 360 bits. En la desintercalación de formación de grupos, una secuencia del código LDPC que ha sido sometido al intercalado de formación de grupos es restaurado a una secuencia original. Por ejemplo, la tecnología presente puede ser aplicada a una técnica de realización de transmisión de datos usando un código LDPC.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014104807 | 2014-05-21 | ||
PCT/JP2015/063251 WO2015178213A1 (ja) | 2014-05-21 | 2015-05-08 | データ処理装置、及び、データ処理方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
MX2016014888A MX2016014888A (es) | 2017-02-27 |
MX369906B true MX369906B (es) | 2019-11-26 |
Family
ID=54553886
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016014888A MX369906B (es) | 2014-05-21 | 2015-05-08 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Country Status (7)
Country | Link |
---|---|
US (7) | US20170093430A1 (es) |
EP (1) | EP3148091B1 (es) |
JP (1) | JP6425100B2 (es) |
CN (1) | CN106464269B (es) |
CA (1) | CA2948600C (es) |
MX (1) | MX369906B (es) |
WO (1) | WO2015178213A1 (es) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3048734B1 (en) | 2013-09-20 | 2019-01-02 | Saturn Licensing LLC | Encoding and decoding of a rate 10/15 ldpc code of length 16200 for dvb |
WO2015041073A1 (ja) * | 2013-09-20 | 2015-03-26 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
MX369906B (es) | 2014-05-21 | 2019-11-26 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
MX362019B (es) * | 2014-05-21 | 2019-01-04 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
JP6425098B2 (ja) * | 2014-05-21 | 2018-11-21 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
WO2016137254A1 (ko) | 2015-02-27 | 2016-09-01 | 한국전자통신연구원 | 가변 길이 시그널링 정보 부호화를 위한 패리티 인터리빙 장치 및 이를 이용한 패리티 인터리빙 방법 |
KR102453474B1 (ko) * | 2015-02-27 | 2022-10-14 | 한국전자통신연구원 | 가변 길이 시그널링 정보 부호화를 위한 패리티 인터리빙 장치 및 이를 이용한 패리티 인터리빙 방법 |
MY182312A (en) * | 2015-06-22 | 2021-01-19 | Ericsson Telefon Ab L M | Blanking pattern indication for resource utilization in cellular radio communication |
AU2015400707B2 (en) * | 2015-07-01 | 2018-08-09 | Huawei Technologies Co., Ltd. | Apparatus and method for non-orthogonal transmissions |
JP7180802B2 (ja) * | 2017-02-06 | 2022-11-30 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP6852427B2 (ja) * | 2017-02-06 | 2021-03-31 | ソニー株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP6891519B2 (ja) * | 2017-02-06 | 2021-06-18 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP7090506B2 (ja) * | 2017-08-16 | 2022-06-24 | 日本放送協会 | 送信装置、受信装置及びチップ |
JP7047906B2 (ja) * | 2018-05-18 | 2022-04-05 | 日本電気株式会社 | 入出力処理割り当て制御装置、入出力処理割り当て制御システム、入出力処理割り当て制御方法、及び、入出力処理割り当て制御プログラム |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1983861B (zh) * | 2005-06-21 | 2012-09-26 | 三星电子株式会社 | 通信系统中发送/接收数据的装置和方法 |
DK2093887T3 (da) * | 2008-02-18 | 2013-11-25 | Samsung Electronics Co Ltd | Apparat og fremgangsmåde til kanalkodning og -afkodning i et kommunikationssystem under brug af Low-Density Parity-Check koder |
EP2134051A1 (en) | 2008-06-13 | 2009-12-16 | THOMSON Licensing | An adaptive QAM transmission scheme for improving performance on an AWGN channel |
JP5648852B2 (ja) * | 2011-05-27 | 2015-01-07 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
JP5664919B2 (ja) | 2011-06-15 | 2015-02-04 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
EP2560311A1 (en) * | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
EP3048734B1 (en) | 2013-09-20 | 2019-01-02 | Saturn Licensing LLC | Encoding and decoding of a rate 10/15 ldpc code of length 16200 for dvb |
WO2015041073A1 (ja) | 2013-09-20 | 2015-03-26 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
MX369906B (es) | 2014-05-21 | 2019-11-26 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
WO2015178212A1 (ja) | 2014-05-21 | 2015-11-26 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
MX362019B (es) | 2014-05-21 | 2019-01-04 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
-
2015
- 2015-05-08 MX MX2016014888A patent/MX369906B/es active IP Right Grant
- 2015-05-08 US US15/310,930 patent/US20170093430A1/en not_active Abandoned
- 2015-05-08 CN CN201580025036.8A patent/CN106464269B/zh active Active
- 2015-05-08 EP EP15796840.5A patent/EP3148091B1/en active Active
- 2015-05-08 JP JP2016521027A patent/JP6425100B2/ja not_active Expired - Fee Related
- 2015-05-08 CA CA2948600A patent/CA2948600C/en active Active
- 2015-05-08 WO PCT/JP2015/063251 patent/WO2015178213A1/ja active Application Filing
-
2018
- 2018-03-26 US US15/935,439 patent/US10333550B2/en active Active
-
2019
- 2019-03-01 US US16/290,147 patent/US10686470B2/en active Active
- 2019-03-01 US US16/289,937 patent/US10680649B2/en active Active
-
2020
- 2020-04-21 US US16/854,459 patent/US11356118B2/en active Active
- 2020-04-21 US US16/854,501 patent/US11316533B2/en active Active
-
2022
- 2022-05-04 US US17/661,981 patent/US11658683B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20190319639A1 (en) | 2019-10-17 |
US11658683B2 (en) | 2023-05-23 |
JP6425100B2 (ja) | 2018-11-21 |
CN106464269A (zh) | 2017-02-22 |
WO2015178213A1 (ja) | 2015-11-26 |
US10333550B2 (en) | 2019-06-25 |
US20200252082A1 (en) | 2020-08-06 |
EP3148091A1 (en) | 2017-03-29 |
EP3148091B1 (en) | 2021-03-10 |
US10686470B2 (en) | 2020-06-16 |
CN106464269B (zh) | 2019-12-06 |
US20170093430A1 (en) | 2017-03-30 |
US20220263521A1 (en) | 2022-08-18 |
US20190199374A1 (en) | 2019-06-27 |
US20180287638A1 (en) | 2018-10-04 |
CA2948600A1 (en) | 2015-11-26 |
US10680649B2 (en) | 2020-06-09 |
CA2948600C (en) | 2022-11-29 |
EP3148091A4 (en) | 2018-05-23 |
JPWO2015178213A1 (ja) | 2017-04-20 |
US11316533B2 (en) | 2022-04-26 |
US20200321980A1 (en) | 2020-10-08 |
MX2016014888A (es) | 2017-02-27 |
US11356118B2 (en) | 2022-06-07 |
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