MX2016003552A - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents

Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Info

Publication number
MX2016003552A
MX2016003552A MX2016003552A MX2016003552A MX2016003552A MX 2016003552 A MX2016003552 A MX 2016003552A MX 2016003552 A MX2016003552 A MX 2016003552A MX 2016003552 A MX2016003552 A MX 2016003552A MX 2016003552 A MX2016003552 A MX 2016003552A
Authority
MX
Mexico
Prior art keywords
data processing
group
ldpc code
code
processing device
Prior art date
Application number
MX2016003552A
Other languages
English (en)
Inventor
Yuji Shinohara
Makiko Yamamoto
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of MX2016003552A publication Critical patent/MX2016003552A/es

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/1177—Regular LDPC codes with parity-check matrices wherein all rows and columns have the same row weight and column weight, respectively
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
    • H03M13/356—Unequal error protection [UEP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1867—Arrangements specially adapted for the transmitter end
    • H04L1/1887—Scheduling and prioritising arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20—Modulator circuits; Transmitter circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Algebra (AREA)
  • General Physics & Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

La tecnología presente se relaciona con un dispositivo de procesamiento de datos y un método de procesamiento de datos que hace posible asegurar la buena calidad de comunicación en una transmisión de datos que usa los códigos LDPC. En el intercalado en forma de grupos, un código LDPC cuya longitud de código es de 16200 bits y la velocidad de código es de 6/15, 7/15, 8/15, o 9/15 es intercalado en una unidad de grupo de 360 bits. En la desintercalación en forma de grupos, una secuencia del código LDPC después de la intercalación en forma de grupos, obtenida a partir de los datos transmitidos desde un dispositivo de transmisión a la secuencia original. La tecnología presente puede ser aplicada, por ejemplo, para transmisión de datos o algo similar usando los códigos LDPC.
MX2016003552A 2013-09-26 2014-09-12 Dispositivo de procesamiento de datos y metodo de procesamiento de datos. MX2016003552A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013199086 2013-09-26
PCT/JP2014/074197 WO2015045898A1 (ja) 2013-09-26 2014-09-12 データ処理装置、及びデータ処理方法

Publications (1)

Publication Number Publication Date
MX2016003552A true MX2016003552A (es) 2016-07-21

Family

ID=52743040

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2016003552A MX2016003552A (es) 2013-09-26 2014-09-12 Dispositivo de procesamiento de datos y metodo de procesamiento de datos.

Country Status (8)

Country Link
US (1) US20160261288A1 (es)
EP (1) EP3051703A4 (es)
JP (1) JPWO2015045898A1 (es)
KR (1) KR20160064087A (es)
CN (1) CN105556855A (es)
CA (1) CA2924777A1 (es)
MX (1) MX2016003552A (es)
WO (1) WO2015045898A1 (es)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105453548B (zh) 2013-08-01 2019-04-16 Lg 电子株式会社 发送广播信号的设备、接收广播信号的设备、发送广播信号的方法以及接收广播信号的方法
WO2015016666A1 (en) * 2013-08-01 2015-02-05 Lg Electronics Inc. Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals
CA2923594C (en) 2013-09-20 2022-12-06 Sony Corporation Data processing device and data processing method
KR20160064086A (ko) * 2013-09-26 2016-06-07 소니 주식회사 데이터 처리 장치 및 데이터 처리 방법
CA2924756A1 (en) * 2013-09-26 2015-04-02 Sony Corporation Data processing device and data processing method
CN105379127A (zh) * 2014-05-21 2016-03-02 索尼公司 数据处理装置以及数据处理方法
KR102652135B1 (ko) 2014-05-22 2024-03-28 파나소닉 홀딩스 코퍼레이션 통신 방법 및 통신 장치
EP2947836A1 (en) * 2014-05-22 2015-11-25 Panasonic Corporation Cyclic-block permutations for 1D-4096-QAM with quasi-cyclic LDPC codes and code rates 6/15, 7/15, and 8/15
KR101800415B1 (ko) 2015-03-02 2017-11-23 삼성전자주식회사 송신 장치 및 그의 패리티 퍼뮤테이션 방법
US10326474B2 (en) * 2015-03-02 2019-06-18 Samsung Electronics Co., Ltd. Transmitter and parity permutation method thereof
KR102553322B1 (ko) * 2015-04-20 2023-07-10 한국전자통신연구원 레이어드 디비전 멀티플렉싱을 이용한 방송 신호 프레임 생성 장치 및 방송 신호 프레임 생성 방법
US20160336968A1 (en) * 2015-05-11 2016-11-17 Comtech Ef Data Corp. System and method for encoding and decoding using a plurality of constellations within a single fec block
EP3278479B1 (en) * 2015-07-01 2021-05-19 Huawei Technologies Co., Ltd. Apparatus and method for non-orthogonal transmissions
JP6930375B2 (ja) * 2017-10-31 2021-09-01 ソニーグループ株式会社 送信装置及び送信方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4224777B2 (ja) 2003-05-13 2009-02-18 ソニー株式会社 復号方法および復号装置、並びにプログラム
JP3875693B2 (ja) * 2004-03-24 2007-01-31 株式会社東芝 Ｌｐｃ符号を用いた符号化ビットのマッピング方法及び送信装置
US7543197B2 (en) * 2004-12-22 2009-06-02 Qualcomm Incorporated Pruned bit-reversal interleaver
DE602006011240D1 (de) * 2005-06-21 2010-02-04 Samsung Electronics Co Ltd Vorrichtung und Methode zum Übermitteln/Empfangen von Daten in einem Mehrantennenkommunikationssystem unter Verwendung eines strukturierten Low Density Parity Check (LDPC) Codes
CN100589564C (zh) * 2006-04-18 2010-02-10 华为技术有限公司 一种手持电视系统中的信道交织方法及系统
EP2134051A1 (en) * 2008-06-13 2009-12-16 THOMSON Licensing An adaptive QAM transmission scheme for improving performance on an AWGN channel
JP5630278B2 (ja) * 2010-12-28 2014-11-26 ソニー株式会社 データ処理装置、及びデータ処理方法
JP5664919B2 (ja) * 2011-06-15 2015-02-04 ソニー株式会社 データ処理装置、及び、データ処理方法
EP2536030A1 (en) * 2011-06-16 2012-12-19 Panasonic Corporation Bit permutation patterns for BICM with LDPC codes and QAM constellations
EP2560311A1 (en) * 2011-08-17 2013-02-20 Panasonic Corporation Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes
US8887024B2 (en) * 2013-02-10 2014-11-11 Hughes Network Systems, Llc Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems
WO2015041482A1 (en) * 2013-09-18 2015-03-26 Samsung Electronics Co., Ltd. Transmitting apparatus and puncturing method thereof
KR20160064086A (ko) * 2013-09-26 2016-06-07 소니 주식회사 데이터 처리 장치 및 데이터 처리 방법

Also Published As

Publication number Publication date
CA2924777A1 (en) 2015-04-02
US20160261288A1 (en) 2016-09-08
CN105556855A (zh) 2016-05-04
EP3051703A1 (en) 2016-08-03
KR20160064087A (ko) 2016-06-07
WO2015045898A1 (ja) 2015-04-02
JPWO2015045898A1 (ja) 2017-03-09
EP3051703A4 (en) 2017-06-07

Similar Documents

Publication Publication Date Title
MX2016003557A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2016003548A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2016003552A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2016003553A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2019015354A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX369906B (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2016003551A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2019005297A (es) Dispositivo y metodo para procesar datos.
MX2020000292A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX362019B (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2015014230A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2016010440A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2016003576A (es) Dispositivo de proceso de datos y metodo de proceso de datos.
MX2019015632A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2019015119A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2016000447A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
EP3879848A4 (en) POINT-TO-MULTIPLE POINT DATA TRANSFER METHOD AND ELECTRONIC DEVICE
EP3576323A3 (en) Devices and methods for facilitating non-orthogonal wireless communications
PH12019501754A1 (en) Transmission method and reception device
PH12019501759A1 (en) Transmission method and reception device
MX2016011779A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
MX2019015452A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
PH12020500591A1 (en) Transmission method and reception device
PH12019501862A1 (en) Transmission method and reception device
PH12019501863A1 (en) Transmission method and reception device