MX2020000292A - Dispositivo de procesamiento de datos y metodo de procesamiento de datos. - Google Patents
Dispositivo de procesamiento de datos y metodo de procesamiento de datos.Info
- Publication number
- MX2020000292A MX2020000292A MX2020000292A MX2020000292A MX2020000292A MX 2020000292 A MX2020000292 A MX 2020000292A MX 2020000292 A MX2020000292 A MX 2020000292A MX 2020000292 A MX2020000292 A MX 2020000292A MX 2020000292 A MX2020000292 A MX 2020000292A
- Authority
- MX
- Mexico
- Prior art keywords
- data
- group
- ldpc code
- code
- processing device
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2778—Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2792—Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6522—Intended application, e.g. transmission or communication standard
- H03M13/6552—DVB-T2
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
Esta tecnología pertenece a un dispositivo de procesamiento de datos y a un método de procesamiento de datos que hacen posible asegurar una buena calidad de comunicación cuando se utiliza un código de LDPC para transmitir datos. En el intercalado por grupos, un código de LDPC que tiene una longitud de código (N) de 16,200 bits y una tasa de código (r) de 12/15, 6/15, o 8/15 se intercala en una base por grupo de bits, cada grupo de bits que tiene 360 bits de longitud. En el desintercalado por grupos, el código de LDPC desintercalado se restablece al orden original del mismo. Esta tecnología puede aplicarse, por ejemplo, para transmisión de datos o similares utilizando un código de LDPC.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014104808 | 2014-05-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2020000292A true MX2020000292A (es) | 2020-07-13 |
Family
ID=54553887
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016000449A MX2016000449A (es) | 2014-05-21 | 2015-05-08 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
MX2020000292A MX2020000292A (es) | 2014-05-21 | 2016-01-13 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2016000449A MX2016000449A (es) | 2014-05-21 | 2015-05-08 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Country Status (6)
Country | Link |
---|---|
US (3) | US10425103B2 (es) |
EP (1) | EP3148084B1 (es) |
JP (1) | JP6428649B2 (es) |
CA (1) | CA2918604C (es) |
MX (2) | MX2016000449A (es) |
WO (1) | WO2015178214A1 (es) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015041073A1 (ja) * | 2013-09-20 | 2015-03-26 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
MX362019B (es) | 2014-05-21 | 2019-01-04 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
US10382062B2 (en) | 2014-05-21 | 2019-08-13 | Sony Corporation | Data processing device and data processing method |
KR102453474B1 (ko) * | 2015-02-27 | 2022-10-14 | 한국전자통신연구원 | 가변 길이 시그널링 정보 부호화를 위한 패리티 인터리빙 장치 및 이를 이용한 패리티 인터리빙 방법 |
WO2016137254A1 (ko) | 2015-02-27 | 2016-09-01 | 한국전자통신연구원 | 가변 길이 시그널링 정보 부호화를 위한 패리티 인터리빙 장치 및 이를 이용한 패리티 인터리빙 방법 |
US20160336968A1 (en) * | 2015-05-11 | 2016-11-17 | Comtech Ef Data Corp. | System and method for encoding and decoding using a plurality of constellations within a single fec block |
WO2016199595A1 (ja) * | 2015-06-10 | 2016-12-15 | ソニー株式会社 | データ処理装置、データ処理方法、およびプログラム |
JP6891519B2 (ja) * | 2017-02-06 | 2021-06-18 | ソニーグループ株式会社 | 送信装置、送信方法、受信装置、及び、受信方法 |
JP7047906B2 (ja) * | 2018-05-18 | 2022-04-05 | 日本電気株式会社 | 入出力処理割り当て制御装置、入出力処理割り当て制御システム、入出力処理割り当て制御方法、及び、入出力処理割り当て制御プログラム |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1983861B (zh) * | 2005-06-21 | 2012-09-26 | 三星电子株式会社 | 通信系统中发送/接收数据的装置和方法 |
JP2007009494A (ja) | 2005-06-29 | 2007-01-18 | Pal Co Ltd | 化粧目地付き化粧板及び化粧目地加工方法。 |
TWI497920B (zh) * | 2007-11-26 | 2015-08-21 | Sony Corp | Data processing device and data processing method |
DK2509270T3 (en) * | 2007-11-26 | 2017-07-31 | Sony Corp | DECODER AND PROCEDURE FOR A RATE 2/3 64K LDPC CODE |
TWI538415B (zh) * | 2007-11-26 | 2016-06-11 | Sony Corp | Data processing device and data processing method |
TWI390856B (zh) * | 2007-11-26 | 2013-03-21 | Sony Corp | Data processing device and data processing method |
TWI459724B (zh) * | 2007-11-26 | 2014-11-01 | Sony Corp | Data processing device and data processing method |
TWI410055B (zh) * | 2007-11-26 | 2013-09-21 | Sony Corp | Data processing device, data processing method and program product for performing data processing method on computer |
EP2134051A1 (en) | 2008-06-13 | 2009-12-16 | THOMSON Licensing | An adaptive QAM transmission scheme for improving performance on an AWGN channel |
JP5664919B2 (ja) | 2011-06-15 | 2015-02-04 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
EP2560311A1 (en) * | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
KR20150005853A (ko) * | 2013-07-05 | 2015-01-15 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
MX362019B (es) | 2014-05-21 | 2019-01-04 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
AT521220A1 (de) | 2018-04-25 | 2019-11-15 | Boehlerit Gmbh & Co Kg | Schneidelement für eine landwirtschaftliche Maschine |
-
2015
- 2015-05-08 MX MX2016000449A patent/MX2016000449A/es active IP Right Grant
- 2015-05-08 JP JP2015560879A patent/JP6428649B2/ja not_active Expired - Fee Related
- 2015-05-08 US US14/904,916 patent/US10425103B2/en active Active
- 2015-05-08 EP EP15795498.3A patent/EP3148084B1/en active Active
- 2015-05-08 CA CA2918604A patent/CA2918604C/en active Active
- 2015-05-08 WO PCT/JP2015/063252 patent/WO2015178214A1/ja active Application Filing
-
2016
- 2016-01-13 MX MX2020000292A patent/MX2020000292A/es unknown
-
2019
- 2019-07-19 US US16/517,308 patent/US11043968B2/en active Active
- 2019-07-19 US US16/517,278 patent/US11070233B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CA2918604A1 (en) | 2015-11-26 |
US10425103B2 (en) | 2019-09-24 |
EP3148084A4 (en) | 2018-05-16 |
US11070233B2 (en) | 2021-07-20 |
JP6428649B2 (ja) | 2018-11-28 |
CA2918604C (en) | 2023-01-31 |
JPWO2015178214A1 (ja) | 2017-04-20 |
US20160149589A1 (en) | 2016-05-26 |
US20190341934A1 (en) | 2019-11-07 |
EP3148084B1 (en) | 2021-02-24 |
US11043968B2 (en) | 2021-06-22 |
WO2015178214A1 (ja) | 2015-11-26 |
EP3148084A1 (en) | 2017-03-29 |
MX2016000449A (es) | 2016-08-11 |
US20190341933A1 (en) | 2019-11-07 |
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