MX2015014877A - Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos. - Google Patents
Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos.Info
- Publication number
- MX2015014877A MX2015014877A MX2015014877A MX2015014877A MX2015014877A MX 2015014877 A MX2015014877 A MX 2015014877A MX 2015014877 A MX2015014877 A MX 2015014877A MX 2015014877 A MX2015014877 A MX 2015014877A MX 2015014877 A MX2015014877 A MX 2015014877A
- Authority
- MX
- Mexico
- Prior art keywords
- bit
- bits
- data processing
- code
- symbol
- Prior art date
Links
- 238000003672 processing method Methods 0.000 title abstract 2
- 230000005540 biological transmission Effects 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/007—Unequal error protection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L2001/0092—Error control systems characterised by the topology of the transmission link
- H04L2001/0093—Point-to-multipoint
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Dc Digital Transmission (AREA)
Abstract
La presente invención se refiere a: un dispositivo de procesamiento de datos capaz de garantizar buena calidad de comunicaciones durante la transmisión de los datos utilizando el código LDPC; y un método para el procesamiento de datos. Los bits de código para el código LDPC que tiene una longitud de código de 16200 bits y una tasa de codificación de 8/15, se reemplazan por los bits de símbolo, para símbolos correspondientes a cualquiera de los ocho puntos de señal que prescribe el 8PSK. Cuando se asignan, a un símbolo, los bits de código de 3 bits almacenados en las unidades de almacenaje que tienen una capacidad de almacenamiento de 3x16200/3 bits y leen un bit a la vez desde cada unidad de almacenaje, los bits b0, b1 y b2 son cada uno reemplazado por y1, y0 y y2, respectivamente, cuando el bit #i+1 del bit más significativo entre los bits de código de 3 bits se establece como bit b#i y el #i+1 bit del bit más significativo entre los bits de símbolo de 3 bits en un símbolo se establece como bit y#i. La presente invención se aplica, por ejemplo, a la transmisión de datos, etc., que utilizan el código LDPC.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013096995 | 2013-05-02 | ||
PCT/JP2014/061155 WO2014178299A1 (ja) | 2013-05-02 | 2014-04-21 | データ処理装置、及びデータ処理方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
MX2015014877A true MX2015014877A (es) | 2016-03-07 |
MX353905B MX353905B (es) | 2018-02-02 |
Family
ID=51843433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2015014877A MX353905B (es) | 2013-05-02 | 2014-04-21 | Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos. |
Country Status (10)
Country | Link |
---|---|
US (1) | US9838037B2 (es) |
EP (1) | EP2993791B1 (es) |
JP (1) | JP6229901B2 (es) |
KR (1) | KR102113711B1 (es) |
CN (1) | CN105191148B (es) |
BR (1) | BR112015027145B1 (es) |
MX (1) | MX353905B (es) |
RU (1) | RU2656726C2 (es) |
WO (1) | WO2014178299A1 (es) |
ZA (1) | ZA201507470B (es) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9859922B2 (en) * | 2013-05-02 | 2018-01-02 | Sony Corporation | Data processing device and data processing method |
MX354314B (es) * | 2013-05-02 | 2018-02-26 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4224777B2 (ja) | 2003-05-13 | 2009-02-18 | ソニー株式会社 | 復号方法および復号装置、並びにプログラム |
KR100809619B1 (ko) * | 2003-08-26 | 2008-03-05 | 삼성전자주식회사 | 이동 통신 시스템에서 블록 저밀도 패러티 검사 부호부호화/복호 장치 및 방법 |
WO2008052202A1 (en) * | 2006-10-26 | 2008-05-02 | Qualcomm Incorporated | Coding schemes for wireless communication transmissions |
US8145971B2 (en) * | 2006-11-29 | 2012-03-27 | Mediatek Inc. | Data processing systems and methods for processing digital data with low density parity check matrix |
US8234538B2 (en) * | 2007-04-26 | 2012-07-31 | Nec Laboratories America, Inc. | Ultra high-speed optical transmission based on LDPC-coded modulation and coherent detection for all-optical network |
JP4788650B2 (ja) * | 2007-04-27 | 2011-10-05 | ソニー株式会社 | Ldpc復号装置およびその復号方法、並びにプログラム |
TWI410055B (zh) * | 2007-11-26 | 2013-09-21 | Sony Corp | Data processing device, data processing method and program product for performing data processing method on computer |
TWI459724B (zh) * | 2007-11-26 | 2014-11-01 | Sony Corp | Data processing device and data processing method |
WO2009075143A1 (ja) * | 2007-12-13 | 2009-06-18 | Nec Corporation | 復号装置、データ蓄積装置、データ通信システム、および復号方法 |
EP2254250B1 (en) * | 2008-03-03 | 2015-05-27 | RAI RADIOTELEVISIONE ITALIANA (S.p.A.) | Bit permutation patterns for LDPC coded modulation and 64QAM constellations |
ITTO20080472A1 (it) | 2008-06-16 | 2009-12-17 | Rai Radiotelevisione Italiana Spa | Metodo di elaborazione di segnali digitali e sistema di trasmissione e ricezione che implementa detto metodo |
JP5320964B2 (ja) * | 2008-10-08 | 2013-10-23 | ソニー株式会社 | サイクリックシフト装置、サイクリックシフト方法、ldpc復号装置、テレビジョン受像機、及び、受信システム |
US8793745B2 (en) * | 2010-04-14 | 2014-07-29 | Hughes Network Systems, Llc | Method and apparatus for data rate controller for a code block multiplexing scheme |
JP5542580B2 (ja) * | 2010-08-25 | 2014-07-09 | 日本放送協会 | 送信装置及び受信装置 |
JP5630278B2 (ja) * | 2010-12-28 | 2014-11-26 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
JP5648852B2 (ja) * | 2011-05-27 | 2015-01-07 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
JP5664919B2 (ja) | 2011-06-15 | 2015-02-04 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
EP2536030A1 (en) * | 2011-06-16 | 2012-12-19 | Panasonic Corporation | Bit permutation patterns for BICM with LDPC codes and QAM constellations |
EP2560311A1 (en) * | 2011-08-17 | 2013-02-20 | Panasonic Corporation | Cyclic-block permutations for spatial multiplexing with quasi-cyclic LDPC codes |
US9294131B2 (en) * | 2013-02-10 | 2016-03-22 | Hughes Network Systems, Llc | Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems |
US8929400B2 (en) * | 2013-02-10 | 2015-01-06 | Hughes Network Systems, Llc | Apparatus and method for support of communications services and applications over relatively low signal-to-noise ratio links |
US9679572B2 (en) * | 2013-04-23 | 2017-06-13 | The Korea Development Bank | Method and apparatus for encoding/decoding scalable digital audio using direct audio channel data and indirect audio channel data |
US9859922B2 (en) * | 2013-05-02 | 2018-01-02 | Sony Corporation | Data processing device and data processing method |
EP2993794B1 (en) | 2013-05-02 | 2022-04-06 | Sony Group Corporation | Ldpc coded modulation in combination with 8psk and 16apsk |
MX354314B (es) * | 2013-05-02 | 2018-02-26 | Sony Corp | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
KR102113942B1 (ko) * | 2013-09-20 | 2020-06-02 | 새턴 라이센싱 엘엘씨 | 데이터 처리 장치 및 데이터 처리 방법 |
-
2014
- 2014-04-21 WO PCT/JP2014/061155 patent/WO2014178299A1/ja active Application Filing
- 2014-04-21 CN CN201480023816.4A patent/CN105191148B/zh active Active
- 2014-04-21 JP JP2015514813A patent/JP6229901B2/ja not_active Expired - Fee Related
- 2014-04-21 MX MX2015014877A patent/MX353905B/es active IP Right Grant
- 2014-04-21 BR BR112015027145-6A patent/BR112015027145B1/pt active IP Right Grant
- 2014-04-21 KR KR1020157031032A patent/KR102113711B1/ko active IP Right Grant
- 2014-04-21 EP EP14791585.4A patent/EP2993791B1/en active Active
- 2014-04-21 US US14/782,688 patent/US9838037B2/en active Active
- 2014-04-21 RU RU2015146023A patent/RU2656726C2/ru active
-
2015
- 2015-10-08 ZA ZA2015/07470A patent/ZA201507470B/en unknown
Also Published As
Publication number | Publication date |
---|---|
CN105191148A (zh) | 2015-12-23 |
RU2015146023A3 (es) | 2018-03-21 |
ZA201507470B (en) | 2016-04-28 |
EP2993791A4 (en) | 2017-04-12 |
US20160134304A1 (en) | 2016-05-12 |
MX353905B (es) | 2018-02-02 |
EP2993791B1 (en) | 2021-07-07 |
JPWO2014178299A1 (ja) | 2017-02-23 |
US9838037B2 (en) | 2017-12-05 |
EP2993791A1 (en) | 2016-03-09 |
BR112015027145A2 (pt) | 2017-07-25 |
BR112015027145B1 (pt) | 2022-05-31 |
WO2014178299A1 (ja) | 2014-11-06 |
KR20160002859A (ko) | 2016-01-08 |
RU2015146023A (ru) | 2017-04-27 |
RU2656726C2 (ru) | 2018-06-06 |
CN105191148B (zh) | 2019-06-21 |
JP6229901B2 (ja) | 2017-11-22 |
KR102113711B1 (ko) | 2020-06-02 |
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