KR970073270A - 다층 인쇄 배선판을 유지하기 위한 블로킹 장치(Blocking System for Holding Multilayer Printed Circuit Boards in Place During Polymerisaion of the Intermediate Insulating Sheets) - Google Patents

다층 인쇄 배선판을 유지하기 위한 블로킹 장치(Blocking System for Holding Multilayer Printed Circuit Boards in Place During Polymerisaion of the Intermediate Insulating Sheets) Download PDF

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Publication number
KR970073270A
KR970073270A KR1019970012263A KR19970012263A KR970073270A KR 970073270 A KR970073270 A KR 970073270A KR 1019970012263 A KR1019970012263 A KR 1019970012263A KR 19970012263 A KR19970012263 A KR 19970012263A KR 970073270 A KR970073270 A KR 970073270A
Authority
KR
South Korea
Prior art keywords
multilayer printed
printed wiring
intermediate insulating
polymerisaion
multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019970012263A
Other languages
English (en)
Korean (ko)
Inventor
피에르루이지 볼피
Original Assignee
베스치 파우스토
에스오. 엠에이. 씨아이. 에스. 쏘시에떼 퍼 아찌오니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 베스치 파우스토, 에스오. 엠에이. 씨아이. 에스. 쏘시에떼 퍼 아찌오니 filed Critical 베스치 파우스토
Publication of KR970073270A publication Critical patent/KR970073270A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4638—Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00—Ancillary operations in connection with laminating processes
    • B32B38/18—Handling of layers or the laminate
    • B32B38/1825—Handling of layers or the laminate characterised by the control or constructional features of devices for tensioning, stretching or registration
    • B32B38/1833—Positioning, e.g. registration or centering
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment
    • B32B2457/08—PCBs, i.e. printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/065—Binding insulating layers without adhesive, e.g. by local heating or welding, before lamination of the whole PCB

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
KR1019970012263A 1996-04-05 1997-04-03 다층 인쇄 배선판을 유지하기 위한 블로킹 장치(Blocking System for Holding Multilayer Printed Circuit Boards in Place During Polymerisaion of the Intermediate Insulating Sheets) Withdrawn KR970073270A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT96MC000043A ITMC960043A1 (it) 1996-04-05 1996-04-05 Sistema per mantenere bloccati i pannelli dei circuiti stampati multistrato durante la polimerizzazione dei fogli isolanti intermedi
ITMC96A000043 1996-04-05

Publications (1)

Publication Number Publication Date
KR970073270A true KR970073270A (ko) 1997-11-07

Family

ID=11357197

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970012263A Withdrawn KR970073270A (ko) 1996-04-05 1997-04-03 다층 인쇄 배선판을 유지하기 위한 블로킹 장치(Blocking System for Holding Multilayer Printed Circuit Boards in Place During Polymerisaion of the Intermediate Insulating Sheets)

Country Status (5)

Country Link
EP (1) EP0800337A1 (enExample)
JP (1) JPH1032387A (enExample)
KR (1) KR970073270A (enExample)
CA (1) CA2201700A1 (enExample)
IT (1) ITMC960043A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19830628C1 (de) * 1998-07-09 2000-04-20 Lauffer Maschf Verfahren zum Verpressen von Mehrlagenleiterplatten (Multilayer)
US6162314A (en) * 1998-09-29 2000-12-19 Alliant Techsystems Inc. Thermal welding of fiber reinforced thermoplastic prepreg
IT1317799B1 (it) * 2000-06-02 2003-07-15 Cedal Srl Sistema per la saldatura del pacco di layers e di fogli di pre-pregdestinato alla formazione in presse a caldo di un circuito

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE465399B (sv) * 1990-05-16 1991-09-02 Perstorp Ab Saett vid tillverkning av flerlagermoensterkort
DE4029970A1 (de) * 1990-09-21 1992-04-02 Siemens Nixdorf Inf Syst Verfahren zum verpressen von mehrlagenleiterplatten

Also Published As

Publication number Publication date
ITMC960043A1 (it) 1997-10-05
CA2201700A1 (en) 1997-10-05
JPH1032387A (ja) 1998-02-03
EP0800337A1 (en) 1997-10-08
ITMC960043A0 (enExample) 1996-04-05

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Legal Events

Date Code Title Description
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19970403

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid