KR970054547A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents
Capacitor Manufacturing Method of Semiconductor Device Download PDFInfo
- Publication number
- KR970054547A KR970054547A KR1019950046832A KR19950046832A KR970054547A KR 970054547 A KR970054547 A KR 970054547A KR 1019950046832 A KR1019950046832 A KR 1019950046832A KR 19950046832 A KR19950046832 A KR 19950046832A KR 970054547 A KR970054547 A KR 970054547A
- Authority
- KR
- South Korea
- Prior art keywords
- electrode
- depositing
- semiconductor device
- capacitor
- manufacturing
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 6
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 6
- 239000004065 semiconductor Substances 0.000 title claims abstract description 5
- 238000000034 method Methods 0.000 claims abstract description 5
- 238000000151 deposition Methods 0.000 claims abstract 7
- 239000002184 metal Substances 0.000 claims abstract 4
- 238000000059 patterning Methods 0.000 claims abstract 4
- 230000001681 protective effect Effects 0.000 claims abstract 4
- 238000002844 melting Methods 0.000 claims abstract 2
- 230000008018 melting Effects 0.000 claims abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract 2
- 239000000758 substrate Substances 0.000 claims abstract 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
본 발명은 반도체 소자의 캐패시터 제조방법에 관한 것으로, 주문형 집적회로(ASIC : Application Specific IC) 공정에서 저전압화 특성을 갖는 캐패시터 제조방법을 제공하기 위한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device, and to provide a method of manufacturing a capacitor having low voltage reduction characteristics in an application specific IC (ASIC) process.
이를 위한 본 발명의 반도체 소자의 캐패시터 제조방법은 절연기판상에 다결정 실리콘과 고융점 금속을 차례로 증착하여 폴리 사이드층을 형성하고 이를 패터닝 하여 제1전극을 형성하는 단계, 제1전극을 포함한 전면에 보호막을 증착한 후 상기 제1전극의 표면이 노출되도록 보호막을 선택적으로 제거하는 단계, 상기 노출된 제1전극의 표면을 포함한 전면에 유전체막을 형성하는 단계, 상기 유전체막상에 금속을 증착하고 패터닝 하여 제2전극을 형성하는 단계를 포함하여 이루어짐을 특징으로 한다.The method of manufacturing a capacitor of a semiconductor device of the present invention for this purpose is to form a polyside layer by sequentially depositing polycrystalline silicon and a high melting point metal on an insulating substrate and patterning it to form a first electrode, the front surface including the first electrode Selectively depositing the protective film to expose the surface of the first electrode after depositing the protective film, forming a dielectric film on the entire surface including the exposed surface of the first electrode, depositing and patterning a metal on the dielectric film And forming a second electrode.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제4도 (a)∼(c)는 본 발명에 반도체 소자의 캐패시터 제조방법을 나타낸 공정단면도.4 (a) to 4 (c) are process cross-sectional views showing a method for manufacturing a capacitor of a semiconductor device in the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950046832A KR0166778B1 (en) | 1995-12-05 | 1995-12-05 | Method for manufacturing a capacitor of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950046832A KR0166778B1 (en) | 1995-12-05 | 1995-12-05 | Method for manufacturing a capacitor of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970054547A true KR970054547A (en) | 1997-07-31 |
KR0166778B1 KR0166778B1 (en) | 1999-01-15 |
Family
ID=19437872
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950046832A KR0166778B1 (en) | 1995-12-05 | 1995-12-05 | Method for manufacturing a capacitor of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0166778B1 (en) |
-
1995
- 1995-12-05 KR KR1019950046832A patent/KR0166778B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0166778B1 (en) | 1999-01-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR980003732A (en) | Manufacturing method of liquid crystal display device | |
KR940015562A (en) | Liquid crystal display device manufacturing method | |
KR970054547A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR960035876A (en) | Capacitor dielectric film formation method of semiconductor device | |
KR970053822A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR950004548A (en) | Semiconductor device manufacturing method | |
KR970052432A (en) | Gate electrode formation method of semiconductor device | |
KR970054050A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR930011212A (en) | Semiconductor Cell Manufacturing Method Using Epi-Si Deposition | |
KR980005304A (en) | Method for Forming Photosensitive Film of Semiconductor Device | |
KR970003479A (en) | Ambush contact forming method of semiconductor device | |
KR930003254A (en) | Metal wiring method of semiconductor device | |
KR970053803A (en) | Method of forming protective film of semiconductor device | |
KR960039373A (en) | Capacitor Manufacturing Method of Semiconductor Device | |
KR970052255A (en) | Contact hole filling method of semiconductor device | |
KR960026867A (en) | Manufacturing method of semiconductor device | |
KR940016803A (en) | Capacitor Formation Method of Hybrid Integrated Devices | |
KR940016508A (en) | Method for manufacturing a contact of a semiconductor device having an inclined surface | |
KR960015735A (en) | Electrode Formation Method of Semiconductor Device | |
KR970072505A (en) | Method for manufacturing electroluminescent device | |
KR960026649A (en) | Semiconductor device and method for manufacturing same for reducing coupling noise | |
KR920016611A (en) | Metal silicide protective layer manufacturing method | |
KR950002009A (en) | Manufacturing method of wiring device of semiconductor device | |
KR950004588A (en) | MOS transistor gate electrode manufacturing method | |
KR920013627A (en) | Titanium Silicide Formation Method of Semiconductor Device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20100825 Year of fee payment: 13 |
|
LAPS | Lapse due to unpaid annual fee |