KR960039373A

KR960039373A - Capacitor Manufacturing Method of Semiconductor Device

Info

Publication number: KR960039373A
Application number: KR1019950009547A
Authority: KR
Inventors: 엄재철
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1995-04-22
Filing date: 1995-04-22
Publication date: 1996-11-25

Abstract

본 발명은 반도체소자의 캐패시터 제조방법에 관한 것으로, 전도물질을 증착하고 캐패시터 마스크를 이용한 식각공정으로 상기 전도물질을 식각함으로써 두개의 패턴, 즉 제1전극과 제2전극을 형성한 다음, 전체표면상부에 유전체막을 일정두께 형성하고 그 상부에 제3전극을 형성함으로써 상기 제1전극으로부터 제3전극을 통하여 제2전극까지 직렬연결된 두개의 캐패시터를 형성하여 상기 유전체막에 인가되는 전압을 종래기술에서보다 작게 됨으로써 상기 유전체막의 두께를 얇게 형성할 수 있어 반도체소자의 신뢰성 저하없이 반도체소자의 고집적화가 가능한 기술이다.The present invention relates to a method of manufacturing a capacitor of a semiconductor device, by depositing a conductive material and etching the conductive material by an etching process using a capacitor mask to form two patterns, that is, the first electrode and the second electrode, and then the entire surface By forming a dielectric film on a predetermined thickness and forming a third electrode thereon, two capacitors connected in series from the first electrode to the second electrode through the third electrode are formed to form a voltage applied to the dielectric film. By making it smaller, the thickness of the dielectric film can be made thin, and thus, the semiconductor device can be highly integrated without lowering the reliability of the semiconductor device.

Description

Capacitor Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2A도 내지 제2D도는 본 발명의 실시예에 따른 반도체소자의 캐패시터 제조공정을 도시한 개략도.2A to 2D are schematic views showing a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

Claims

A method of manufacturing a capacitor for a semiconductor device comprising the steps of forming a first electrode and a second electrode, forming a dielectric film over the entire surface, and forming a third electrode over the entire surface.

The method of claim 1, wherein the first and second electrodes are formed by etching an electrode material on the semiconductor substrate and etching using a first capacitor mask.

The method of claim 1 or 2, wherein the first, second and third electrodes are formed of polycrystalline silicon.

The method of claim 3, wherein the first, second, and third electrodes are formed of a conductive material having properties similar to those of the polycrystalline silicon.

2. The method of claim 1, wherein the dielectric film is formed of an oxide film.

The method of claim 1, wherein the third electrode is formed by an etching process using a second capacitor mask.

※ Note: The disclosure is based on the initial application.