KR960009151A - Semiconductor Memory and Manufacturing Method - Google Patents

Semiconductor Memory and Manufacturing Method Download PDF

Info

Publication number
KR960009151A
KR960009151A KR1019940020652A KR19940020652A KR960009151A KR 960009151 A KR960009151 A KR 960009151A KR 1019940020652 A KR1019940020652 A KR 1019940020652A KR 19940020652 A KR19940020652 A KR 19940020652A KR 960009151 A KR960009151 A KR 960009151A
Authority
KR
South Korea
Prior art keywords
semiconductor memory
memory device
forming
manufacturing
semiconductor substrate
Prior art date
Application number
KR1019940020652A
Other languages
Korean (ko)
Inventor
유의규
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940020652A priority Critical patent/KR960009151A/en
Publication of KR960009151A publication Critical patent/KR960009151A/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor

Landscapes

  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 기억장치 및 제조방법에 관한 것으로, 반도체소자가 고집적화됨에 따라 좁은 면적에서 더욱 많은 정전용량을 요구하게되어 많은 문제점을 발생시켰다. 따라서, 본 발명은 저장전극마스크를 사용하지 않고 선택적 성장기술을 이용하여 저장전극을 형성한 다음, 그 상부에 유전체막과 플레이트전극을 형성함으로써 충분한 정전용량을 확보하는 반도체 기억장치인 캐패시터를 제조하여 반도체소자의 신뢰성 및 생산성을 향상시키고 반도체소자의 고집적화를 가능하게 하는 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device and a manufacturing method, and as the semiconductor devices are highly integrated, they require more capacitance in a narrow area, causing many problems. Therefore, the present invention forms a storage electrode using a selective growth technique without using a storage electrode mask, and then fabricates a capacitor, a semiconductor memory device, which secures sufficient capacitance by forming a dielectric film and a plate electrode thereon. This technology improves the reliability and productivity of semiconductor devices and enables high integration of semiconductor devices.

Description

반도체 기억장치 및 그 제조방법Semiconductor Memory and Manufacturing Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A도 내지 제2C도는 본 발명의 실시예에 따른 반도체 기억장치 제조공정을 도시한 단면도.2A to 2C are cross-sectional views showing a semiconductor memory device manufacturing process according to the embodiment of the present invention.

Claims (8)

반도체기판의 예정된 부분과 접속되고 못의 머리모양으로 상부가 둥굴게 형성됨으로써 표면적이 증가된 저장전극을 구비하는 반도체 기억장치.A semiconductor memory device having a storage electrode connected to a predetermined portion of a semiconductor substrate and having a rounded top in a shape of a nail, thereby increasing its surface area. 반도체기판 상부에 하부절연층을 형성하고 그 상부에 제1절연막과 제2절연막을 순차적으로 형성하는 공정과, 상기 제2절연막 상부에 콘택마스크를 형성하는 공정과, 상기 콘택마스트를 이용하여 상기 제2절연막, 제1절연막 및 하부절연 층을 식각함으로써 상기 반도체기판의 예정된 부분을 노출시키는 콘택홀을 형성하는 공정과, 상기 노출된 반도체기판 상부에 선택적으로 도전층을 성장시켜 저장전극을 형성하는 공정과, 상기 제2절연막을 습십방법으로 제거하는 공정과, 상기 도전층의 표면에 유전체막과 플레이트전극을 형성하는 공정을 포함하는 반도체 기억장치 제조방법.Forming a lower insulating layer over the semiconductor substrate and sequentially forming a first insulating film and a second insulating film over the semiconductor substrate; forming a contact mask over the second insulating film; and using the contact mask. Forming a contact hole exposing a predetermined portion of the semiconductor substrate by etching the second insulating layer, the first insulating layer and the lower insulating layer; and forming a storage electrode by selectively growing a conductive layer on the exposed semiconductor substrate. And removing the second insulating film by a wet method, and forming a dielectric film and a plate electrode on the surface of the conductive layer. 제2항에 있어서, 상기 제1절연막은 실리콘질화막으로 형성하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of claim 2, wherein the first insulating film is formed of a silicon nitride film. 제2항에 있어서, 상기 도전층은 불순물이 주이보딘 다결정실리콘을 사용하여 형성하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of manufacturing a semiconductor memory device according to claim 2, wherein the conductive layer is formed of impurity using ziibodine polycrystalline silicon. 제2항 또는 제4항에 있어서, 상기 도전층은 텅스텐을 사용하여 형성하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of manufacturing a semiconductor memory device according to claim 2 or 4, wherein the conductive layer is formed using tungsten. 제2항에 있어서, 상기 유전체막은 NO이나 ONO 복합구조의 유전막으로 형성하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of manufacturing a semiconductor memory device according to claim 2, wherein said dielectric film is formed of a dielectric film having a NO or ONO composite structure. 제2항 또는 제6항에 있어서, 상기 유전체막은 탄탈륨옥사이드로 형성하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of manufacturing a semiconductor memory device according to claim 2 or 6, wherein the dielectric film is formed of tantalum oxide. 제2항에 있어서, 상기 플레이트전극을 다결정실리콘이나 폴리사이드 또는 그와 유사한 전도물질로 형성하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of claim 2, wherein the plate electrode is formed of polycrystalline silicon, polyside, or a similar conductive material. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940020652A 1994-08-22 1994-08-22 Semiconductor Memory and Manufacturing Method KR960009151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940020652A KR960009151A (en) 1994-08-22 1994-08-22 Semiconductor Memory and Manufacturing Method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940020652A KR960009151A (en) 1994-08-22 1994-08-22 Semiconductor Memory and Manufacturing Method

Publications (1)

Publication Number Publication Date
KR960009151A true KR960009151A (en) 1996-03-22

Family

ID=66698287

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940020652A KR960009151A (en) 1994-08-22 1994-08-22 Semiconductor Memory and Manufacturing Method

Country Status (1)

Country Link
KR (1) KR960009151A (en)

Similar Documents

Publication Publication Date Title
KR920018927A (en) Capacitor Manufacturing Method for Highly Integrated Semiconductor Memory Devices
KR960008417A (en) Capacitor Manufacturing Method of Semiconductor Device
KR910013571A (en) Method of fabricating integrated circuit with various devices including electrode pairs separated by dielectric material
KR970063730A (en) Ferroelectric memory device and manufacturing method thereof
KR930015002A (en) Semiconductor memory device and manufacturing method thereof
KR970054033A (en) Capacitor Manufacturing Method of Semiconductor Device
KR960009151A (en) Semiconductor Memory and Manufacturing Method
KR980005912A (en) Metal Contact Structure of Semiconductor Device and Manufacturing Method Thereof
KR950026042A (en) Multilayer Capacitor Manufacturing Method
KR940010333A (en) Semiconductor memory device and manufacturing method thereof
KR950028144A (en) Capacitors in Semiconductor Devices
KR100227632B1 (en) Capacitor structure and manufacturing method thereof
KR970008596A (en) Capacitor Manufacturing Method Using HSG Mask
KR950004548A (en) Semiconductor device manufacturing method
KR960026815A (en) Capacitor Manufacturing Method of Semiconductor Device
KR970003991A (en) Capacitor Manufacturing Method of Semiconductor Device
KR930018731A (en) Semiconductor memory device and manufacturing method
KR960043192A (en) Semiconductor Capacitors and Manufacturing Method Thereof
KR960002789A (en) Capacitor Manufacturing Method of Semiconductor Device
KR960026666A (en) Capacitor Manufacturing Method of Semiconductor Device
KR960043190A (en) Capacitor Manufacturing Method of Semiconductor Device
KR960043152A (en) Capacitor of semiconductor device and manufacturing method thereof
KR960026854A (en) Capacitor Manufacturing Method of Semiconductor Device
KR960006027A (en) Capacitor Manufacturing Method of Semiconductor Device
KR960026860A (en) Capacitor Manufacturing Method of Semiconductor Device

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19940822

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19940822

Comment text: Request for Examination of Application

PG1501 Laying open of application
E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

Comment text: Notification of reason for refusal

Patent event date: 19971128

Patent event code: PE09021S01D

E601 Decision to refuse application
PE0601 Decision on rejection of patent

Patent event date: 19980217

Comment text: Decision to Refuse Application

Patent event code: PE06012S01D

Patent event date: 19971128

Comment text: Notification of reason for refusal

Patent event code: PE06011S01I