KR970031305A - On / Off delay time elimination system useing integrator - Google Patents

On / Off delay time elimination system useing integrator Download PDF

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Publication number
KR970031305A
KR970031305A KR1019950040871A KR19950040871A KR970031305A KR 970031305 A KR970031305 A KR 970031305A KR 1019950040871 A KR1019950040871 A KR 1019950040871A KR 19950040871 A KR19950040871 A KR 19950040871A KR 970031305 A KR970031305 A KR 970031305A
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South Korea
Prior art keywords
integrator
delay time
power supply
output
power
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KR1019950040871A
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Korean (ko)
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KR0166201B1 (en
Inventor
류영기
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김광호
삼성전자 주식회사
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Priority to KR1019950040871A priority Critical patent/KR0166201B1/en
Publication of KR970031305A publication Critical patent/KR970031305A/en
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Publication of KR0166201B1 publication Critical patent/KR0166201B1/en

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B11/00—Automatic controllers
    • G05B11/01—Automatic controllers electric
    • G05B11/14—Automatic controllers electric in which the output signal represents a discontinuous function of the deviation from the desired value, i.e. discontinuous controllers
    • G05B11/16—Two-step controllers, e.g. with on/off action

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Motor And Converter Starters (AREA)
  • Control Of Electric Motors In General (AREA)

Abstract

본 발명은 공급 전원의 온/오프(ON/OFF)시 불필요한 지연 시간을 최소화하여 시스템의 응답 속도를 높이기 위한 적분기를 이용한 온/오프 지연 시간 제거 시스템에 관한 것으로, 모터에 흐르는 전류에 따라 적분하는 적분기, 및 외부로 부터 입력되는 입력 신호에 따라 상기 적분기로 전원을 공급하는 전원 공급부를 포함하여 구성되는 적분기를 이용한 온/오프 지연 시간 제거 시스템에 있어서, 상기 적분기의 입력단 및 출력단과 접지에 연결되고 상기 전원 공급부로 부터 출력되는 전원에 따라 제어되어 상기 전원 공급부로 부터 출력되는 전원의 온/오프에 의해 발생되는 상기 적분기의 온/오프 지연 시간을 감소시키는 스위칭부를 더 포함하여 구성된다.The present invention relates to an on / off delay time elimination system using an integrator for minimizing unnecessary delay time when the power supply is on / off (ON / OFF) to increase the response speed of the system. An on / off delay time elimination system using an integrator comprising an integrator and a power supply for supplying power to the integrator in response to an input signal input from an external device, the integrator being connected to an input terminal and an output terminal of the integrator and grounded; And a switching unit which is controlled according to the power output from the power supply to reduce the on / off delay time of the integrator generated by the on / off of the power output from the power supply.

Description

적분기를 이용한 온/오프 지연시간 제거시스템(On/Off delay time elimination system useing integrator)On / Off delay time elimination system useing integrator

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 의한 적분기를 이용한 온/오프 지연 시간 제거 시스템의 구성도.3 is a block diagram of a system for eliminating on / off delay time using an integrator according to the present invention.

Claims (3)

모터(11)에 흐르는 전류에 따라 적분하는 적분기(12), 및 외부로 부터 입력되는 입력 신호(IN)에 따라 상기 적분기(12)로 전원(Vcc)을 공급하는 전원 공급부(14)를 포함하여 구성되는 적분기를 이용한 온/오프 지연 시간 제거 시스템에 있어서, 상기 적분기(12)의 입력단 및 출력단과 접지에 연결되고 상기 전원 공급부(14)로 부터 출력되는 전원에 따라 제어되어 상기 전원 공급부(14)로 부터 출력되는 전원의 온/오프에 의해 발생되는 상기 적분기(12)의 온/오프 지연 시간을 감소시키는 스위칭부(18)를 더 포함하여 구성되는 것을 특징으로 하는 적분기를 이용한 온/오프 지연 시간 제거 시스템.Integrator 12 that integrates according to the current flowing in the motor 11, and a power supply unit 14 for supplying power (Vcc) to the integrator 12 in accordance with an input signal (IN) input from the outside; In the on / off delay time elimination system using an integrator configured, connected to the input terminal and the output terminal and the ground of the integrator 12 and controlled in accordance with the power output from the power supply unit 14 is the power supply unit 14 On / off delay time using the integrator further comprises a switching unit 18 for reducing the on / off delay time of the integrator 12 generated by the on / off of the power output from the Removal system. 제1항에 있어서, 상기 적분기(12)는 상기 모터(11)에 일단이 연결되고 접지에 타단이 연결된 제1 저항(R11), 상기 제1 저항(R11)의 일단에 일단이 연결되고, 상기 스위칭부(18)에 타단이 연결된 제2 저항(R12), 상기 제2 저항(R12)의 타단과 스위칭부(18)에 (+)입력단이 연결되고 상기 스위칭부(18)와 래치부(13)에 출력단이 연결된 연산 증폭기(OP-AMP11), 및 상기 연산 증폭기(OP-AMP11)의 출력단과 (+)입력단에 연결된 캐패시터(C11)를 포함하여 구성되는 것을 특징으로 하는 적분기를 이용한 온/오프 지연 시간 제거 시스템.According to claim 1, The integrator 12 is connected to one end of the first resistor (R11), the other end of which is connected to the motor 11 and the other end to the ground, one end of the first resistor (R11), The second resistor R12 having the other end connected to the switching unit 18, the other end of the second resistor R12 and the (+) input terminal are connected to the switching unit 18, and the switching unit 18 and the latch unit 13 are connected to each other. Op / AMP11 connected to the output terminal, and the output terminal and the capacitor (C11) connected to the (+) input terminal of the operational amplifier (OP-AMP11) on / off using an integrator Latency elimination system. 제2항에 있어서, 상기 스위칭부(18)는 상기 연산 증폭기(OP-AMP11)의 (+)입력단과 접지에 연결되고 상기 전원 공급부(14)로 부터 출력되는 전원에 따라 온/오프되는 제1스위치(SW1), 상기 전원 공급부(14)로 부터 출력되는 전원을 반전시키는 인버터(19) 및 상기 연산 증폭기(OP-AMP11)의 출력단과 접지에 연결되고 상기 인버터(19)의 출력에 따라 온/오프되는 제2 스위치(SW2)를 포함하여 구성되는 것을 특징으로 하는 적분기를 이용한 온/오프 지연 시간 제거 시스템.3. The first switch of claim 2, wherein the switching unit 18 is connected to a positive input terminal of the operational amplifier OP-AMP11 and a ground, and is turned on / off according to a power output from the power supply unit 14. A switch SW1, an inverter 19 for inverting the power output from the power supply unit 14 and an output terminal of the operational amplifier OP-AMP11 and a ground, and are turned on / off in accordance with the output of the inverter 19. On / off delay time removal system using an integrator, characterized in that it comprises a second switch (SW2) that is off. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950040871A 1995-11-11 1995-11-11 On/off delay time eliminating system using an integrater KR0166201B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950040871A KR0166201B1 (en) 1995-11-11 1995-11-11 On/off delay time eliminating system using an integrater

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950040871A KR0166201B1 (en) 1995-11-11 1995-11-11 On/off delay time eliminating system using an integrater

Publications (2)

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KR970031305A true KR970031305A (en) 1997-06-26
KR0166201B1 KR0166201B1 (en) 1999-03-20

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