KR960018835A - Reset pulse generator - Google Patents

Reset pulse generator Download PDF

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Publication number
KR960018835A
KR960018835A KR1019940031743A KR19940031743A KR960018835A KR 960018835 A KR960018835 A KR 960018835A KR 1019940031743 A KR1019940031743 A KR 1019940031743A KR 19940031743 A KR19940031743 A KR 19940031743A KR 960018835 A KR960018835 A KR 960018835A
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KR
South Korea
Prior art keywords
input
reset
generating means
signal generating
input signal
Prior art date
Application number
KR1019940031743A
Other languages
Korean (ko)
Other versions
KR970008510B1 (en
Inventor
임창식
류영기
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019940031743A priority Critical patent/KR970008510B1/en
Publication of KR960018835A publication Critical patent/KR960018835A/en
Application granted granted Critical
Publication of KR970008510B1 publication Critical patent/KR970008510B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02—Digital function generators
    • G06F1/022—Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)

Abstract

이 발명은 리셋펄스 발생기에 관한 것으로, 입력신호 발생부(100)와 리셋신호 발생부(200)로 구성되었으며, 저역통과필터를 사용해서 입력전압의 잡음을 감소시켜 그 출력으로 제어회로(300)의 입력으로 사용하는 경우, 리셋기능이 따로 필요할시 종래에는 캐패시터와 연산 증폭기로 구성되는 별도의 리셋펄스 발생기를 추가 설계하였으나, 상기의 불편함을 개선하여 상기 입력신호 발생부(100)의 회로내 충전시간을 이용하고 상기 입력신호 발생부(100)의 출력을 입력으로 하여 간단한 논리회로로 구성된 리셋펄스를 발생시키는 회로에 관한 것이다.The present invention relates to a reset pulse generator, consisting of an input signal generator 100 and a reset signal generator 200, by using a low pass filter to reduce the noise of the input voltage to the output control circuit 300 In case of using as the input of the reset function, when a separate reset pulse generator is required, a separate reset pulse generator composed of a capacitor and an operational amplifier is conventionally designed, but the inconvenience of the above is improved to improve the inconvenience in the circuit of the input signal generator 100. It relates to a circuit for generating a reset pulse consisting of a simple logic circuit by using the charging time and the output of the input signal generator 100 as an input.

Description

리셋펄스 발생기Reset pulse generator

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 이 발명의 실시예에 따른 리셋펄스 발생기를 적용한 블럭도.2 is a block diagram to which a reset pulse generator according to an embodiment of the present invention is applied.

제3도는 이 발명의 실시예에 따른 리셋펄스 발생기를 적용한 회로도.3 is a circuit diagram to which a reset pulse generator according to an embodiment of the present invention is applied.

Claims (3)

저역통과필터를 포함하는 비교회로에서 상기 비교회로의 출력을 리셋신호 발생을 위한 입력신호로 출력하는 입력신호 발생수단과; 상기 입력신호 발생수단에 연결되어, 상기 입력신호 발생수단의 출력신호를 입력으로 하여 리셋신호(RESET)를 해당 제어회로(300)로 출력하는 리셋신호 발생수단(200)으로 구성되는 것을 특징으로 하는 리셋펄스 발생기.Input signal generating means for outputting an output of the comparison circuit as an input signal for generating a reset signal in a comparison circuit including a low pass filter; It is connected to the input signal generating means, characterized in that it comprises a reset signal generating means 200 for outputting a reset signal (RESET) to the control circuit 300 as an output signal of the input signal generating means as an input Reset pulse generator. 제1항에 있어서, 상기 입력신호 발생수단은, 입력전압(VinA, VinB)을 인가하는 스위치(SWA, SWB)와; 입력 전압잡음을 감소시키기 위해 저항(RA1, RB1)과 캐패시터(CA, CB)로 구성된 저역통과 필터(11,21)와; 상기 스위치가 턴온(TURN ON)시 상기 저역통과필터 (11,21)를 구성하는 캐패시터(CA, CB)의 최대전압을 결정하는 저항(RA2, RB2)과; 상기 연산증폭기(COMPA, COMPB)의 출력을 입력신호(INPUTA, INPUTB)로 정의하는 입력신호 발생수단(100)을 포함하는 리셋펄스 발생기.2. The apparatus of claim 1, wherein the input signal generating means comprises: switches SWA and SWB for applying input voltages VinA and VinB; Low pass filters (11, 21) composed of resistors (RA1, RB1) and capacitors (CA, CB) to reduce input voltage noise; Resistors RA2 and RB2 for determining the maximum voltages of capacitors CA and CB constituting the low pass filters 11 and 21 when the switch is turned on; And an input signal generating means (100) which defines the output of said operational amplifiers (COMPA, COMPB) as input signals (INPUTA, INPUTB). 제1항에 있어서, 상기 리셋신호 발생수단은, 상기 입력신호(INPUTA, INPUTB)가 모두 하이상태일 때 리셋신호(RESET)가 하이상태가 되고, 상기 입력신호(INPUTA, INPUTB)가 모두 로우상태일 때 리셋신호(RESET)가 로우상태가 되고, 상기 입력신호(INPUTA, INPUTB)가 모두 하이 또는 로우상태인 경우를 제외한 모든 영역에서 래치-모드(LATCH-MODE)로 동작하도록 구성된 리셋신호 발생 수단(200)을 포함하는 리셋펄스 발생기.2. The reset signal generating means according to claim 1, wherein the reset signal generating means becomes a high state when both of the input signals INPUTA and INPUTB are high, and both of the input signals INPUTA and INPUTB are low. The reset signal generation means configured to operate in the latch-mode in all regions except when the reset signal RESET becomes low and the input signals INPUTA and INPUTB are both high or low. Reset pulse generator comprising a (200). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940031743A 1994-11-29 1994-11-29 Reset pulse generator KR970008510B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940031743A KR970008510B1 (en) 1994-11-29 1994-11-29 Reset pulse generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940031743A KR970008510B1 (en) 1994-11-29 1994-11-29 Reset pulse generator

Publications (2)

Publication Number Publication Date
KR960018835A true KR960018835A (en) 1996-06-17
KR970008510B1 KR970008510B1 (en) 1997-05-24

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Application Number Title Priority Date Filing Date
KR1019940031743A KR970008510B1 (en) 1994-11-29 1994-11-29 Reset pulse generator

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030079442A (en) * 2002-04-04 2003-10-10 삼성전자주식회사 Multi sequence reset circuit

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