KR970013745A - Low power consumption mode discrimination circuit - Google Patents
Low power consumption mode discrimination circuit Download PDFInfo
- Publication number
- KR970013745A KR970013745A KR1019950027219A KR19950027219A KR970013745A KR 970013745 A KR970013745 A KR 970013745A KR 1019950027219 A KR1019950027219 A KR 1019950027219A KR 19950027219 A KR19950027219 A KR 19950027219A KR 970013745 A KR970013745 A KR 970013745A
- Authority
- KR
- South Korea
- Prior art keywords
- node
- power consumption
- predetermined level
- low power
- discrimination circuit
- Prior art date
Links
Abstract
본 발명은 저소비전력 모드판별회로에 관한 것으로서, 특히 3가지 상태로 변하는 입력신호가 인가되는 입력단자와 제1출력단자에 사이에 연결된 제1출력버퍼; 입력단자와 제1노드 사이에 연결되어 상기 입력신호를 소정 레벨로 리미팅하는 리미터; 제1노드에 전달된 전압이 소정 레벨이상이면 턴온되고 이하이면 턴오프되는 상기 제1노드와 제2노드 사이에 연결된 스위치 트랜지스터; 제2노드에 연결된 풀다운수단; 및 제2노드와 제2출력단자 사이에 연결된 제2출력버퍼를 구비한다. 따라서, 본 발명에서는 특정 레벨 이상에서만 제1노드와 제2노드가 연결되고 그 미만에서는 차단되므로 전력소모를 줄일 수 있다.The present invention relates to a low power consumption mode discrimination circuit, and in particular, a first output buffer connected between an input terminal and a first output terminal to which input signals varying in three states are applied; A limiter connected between an input terminal and a first node to limit the input signal to a predetermined level; A switch transistor coupled between the first node and the second node when the voltage transmitted to the first node is higher than or equal to a predetermined level and turned off when the voltage is lower than a predetermined level; Pull-down means connected to a second node; And a second output buffer connected between the second node and the second output terminal. Therefore, in the present invention, since the first node and the second node are connected only at a certain level or more, and cut off at a lower level, power consumption can be reduced.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 의한 모드판별회로의 구성을 나타낸 회로도.2 is a circuit diagram showing the configuration of a mode discrimination circuit according to the present invention.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950027219A KR970013745A (en) | 1995-08-29 | 1995-08-29 | Low power consumption mode discrimination circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950027219A KR970013745A (en) | 1995-08-29 | 1995-08-29 | Low power consumption mode discrimination circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR970013745A true KR970013745A (en) | 1997-03-29 |
Family
ID=66596340
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950027219A KR970013745A (en) | 1995-08-29 | 1995-08-29 | Low power consumption mode discrimination circuit |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR970013745A (en) |
-
1995
- 1995-08-29 KR KR1019950027219A patent/KR970013745A/en not_active Application Discontinuation
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR930003540A (en) | Noise suppressed data output buffer | |
| KR850005038A (en) | High voltage circuit | |
| KR970705237A (en) | Supply and interface configurable input / output buffers (SUPPLY AND INTERFACE CONFIGURABLE INPUT / OUTPUT BUFFER) | |
| KR930018850A (en) | Output buffer device | |
| KR940027316A (en) | Integrated circuit with low power mode and clock amplifier circuit | |
| TW353247B (en) | Output buffer device | |
| KR960025791A (en) | Sense amplifier circuit | |
| KR950023885A (en) | A voltage selector that receives a plurality of inputs and selectively outputs one of them | |
| KR910017734A (en) | Electronic device | |
| TW200513036A (en) | Delay stage insensitive to operating voltage and delay circuit including the same | |
| KR970013745A (en) | Low power consumption mode discrimination circuit | |
| KR960027331A (en) | Buffer circuit and bias circuit | |
| KR920008758A (en) | Power-On Reset Circuit | |
| KR840002174A (en) | Switch circuit | |
| KR920009033A (en) | Discrete current source whose output decreases with increasing control voltage | |
| KR980004959A (en) | Sense amplifier control circuit | |
| KR970055149A (en) | I / O circuit | |
| KR910010875A (en) | Logic circuit | |
| KR950009456A (en) | Input / Output Control Circuit of Microcontroller | |
| KR970055487A (en) | Variable Slew Rate Control Logic Circuit | |
| KR970072697A (en) | Tri-State Output Driver | |
| KR970002828A (en) | Pull-Up / Pull-Down Bidirectional Data Input and Output Short Circuit with Enable | |
| KR970063938A (en) | Output buffer circuit of semiconductor device | |
| KR970055529A (en) | Data input buffer circuit of memory | |
| KR970013731A (en) | Data output buffer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WITN | Withdrawal due to no request for examination |