KR970055487A - Variable Slew Rate Control Logic Circuit - Google Patents

Variable Slew Rate Control Logic Circuit Download PDF

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Publication number
KR970055487A
KR970055487A KR1019950057080A KR19950057080A KR970055487A KR 970055487 A KR970055487 A KR 970055487A KR 1019950057080 A KR1019950057080 A KR 1019950057080A KR 19950057080 A KR19950057080 A KR 19950057080A KR 970055487 A KR970055487 A KR 970055487A
Authority
KR
South Korea
Prior art keywords
slew rate
rate control
control means
turned
logic circuit
Prior art date
Application number
KR1019950057080A
Other languages
Korean (ko)
Inventor
김장홍
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950057080A priority Critical patent/KR970055487A/en
Publication of KR970055487A publication Critical patent/KR970055487A/en

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Abstract

본 발명은 단일 회로로 여러 가지 슬루율을 제어할 수 있는 가변형 슬루율 제어 로직회로에 관한 것으로서, 본 발명 가변형 슬루율 제어 로직회로는 입력신호가 입력되어 최종 출력이 출력되는 인버터와, 상기 인버터의 출력단에 접속되고 제1제어신호에 따라 온오프되는 제1슬루율 제어수단과, 상기 제1슬루율 제어수단에 접속되고 제2제어신호에 따라 온오프되는 제2슬루율 제어수단 및 상기 제2슬루율 제어수단에 접속되고 제3제어신호에 따라 온오프되는 제3슬루율 제어수단을 구비하여 잘목 사용된 슬루율 제어 셀을 수정하지 않고 외부제어신호만을 이용하여 슬루율의 레벨을 변화시킬 수 있는 이점이 있다.The present invention relates to a variable slew rate control logic circuit that can control various slew rates with a single circuit. First slew rate control means connected to an output terminal and turned on and off in accordance with a first control signal, second slew rate control means connected to the first slew rate control means and turned on and off in accordance with a second control signal and the second A third slew rate control means connected to the slew rate control means and turned on and off in accordance with the third control signal can be used to change the level of the slew rate using only an external control signal without modifying the used slew rate control cell. There is an advantage to that.

Description

가변형 슬루율 제어 로직회로Variable Slew Rate Control Logic Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 실시예에 의한 가변형 슬루율 제어 로직회로를 도시한 회로도이다.2 is a circuit diagram showing a variable slew rate control logic circuit according to an embodiment of the present invention.

Claims (1)

입력신호가 입력되어 반전되고 최종 출력이 출력되는 인버터; 상기 인버터의 출력단에 접속되고 제1제어 신호에 따라 온오프되는 제1슬루율 제어수단; 상기 제1슬루율 제어수단에 접속되고 제2제어신호에 따라 온오프되는 제2슬루율 제어수단; 및 상기 제2슬루율 제어수단에 접속되고 제3제어신호에 따라 온오프되는 제3슬루율 제어수단을 구비하는 것을 특징으로 하는 가변형 슬루율 제어 로직회로.An inverter in which an input signal is input and inverted and a final output is output; First slew rate control means connected to an output terminal of the inverter and turned on and off in accordance with a first control signal; Second slew rate control means connected to said first slew rate control means and turned on and off in accordance with a second control signal; And third slew rate control means connected to said second slew rate control means and turned on and off in accordance with a third control signal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950057080A 1995-12-26 1995-12-26 Variable Slew Rate Control Logic Circuit KR970055487A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950057080A KR970055487A (en) 1995-12-26 1995-12-26 Variable Slew Rate Control Logic Circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950057080A KR970055487A (en) 1995-12-26 1995-12-26 Variable Slew Rate Control Logic Circuit

Publications (1)

Publication Number Publication Date
KR970055487A true KR970055487A (en) 1997-07-31

Family

ID=66618320

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950057080A KR970055487A (en) 1995-12-26 1995-12-26 Variable Slew Rate Control Logic Circuit

Country Status (1)

Country Link
KR (1) KR970055487A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487500B1 (en) * 1997-09-23 2005-09-02 삼성전자주식회사 Buffer circuit of semiconductor apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100487500B1 (en) * 1997-09-23 2005-09-02 삼성전자주식회사 Buffer circuit of semiconductor apparatus

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