KR970013731A - Data output buffer - Google Patents

Data output buffer Download PDF

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Publication number
KR970013731A
KR970013731A KR1019950025436A KR19950025436A KR970013731A KR 970013731 A KR970013731 A KR 970013731A KR 1019950025436 A KR1019950025436 A KR 1019950025436A KR 19950025436 A KR19950025436 A KR 19950025436A KR 970013731 A KR970013731 A KR 970013731A
Authority
KR
South Korea
Prior art keywords
power supply
supply voltage
data output
output buffer
pull
Prior art date
Application number
KR1019950025436A
Other languages
Korean (ko)
Inventor
남종기
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950025436A priority Critical patent/KR970013731A/en
Publication of KR970013731A publication Critical patent/KR970013731A/en

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Abstract

본 발명은 반도체 기억장치의 데이타 출력버퍼에 관한 것으로, 외부전원전압이 변하더라도 그에 따라 출력단의 드라이버의 구동능력을 자동으로 조절하도록 출력단자측에 구동력이 큰 드라이버를 풀-업 드라이버단과 병렬로 연결하고, 상기 변화된 외부전원전압을 감지한 신호에 의해 그 동작이 제어되도록 회로를 구현함으로써, 낮은 전원전압일때는 빠른 스피드를 얻을 수 있고 높은 전원전압일때는 칩의 노이즈를 줄여서 고성능의 칩을 구현할 수 있는 효과가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data output buffer of a semiconductor memory device, wherein a driver having a large driving force is connected in parallel with a pull-up driver stage at the output terminal side to automatically adjust the driving capability of the driver of the output stage according to an external power supply voltage change. In addition, by implementing a circuit to control the operation of the signal detected by the changed external power supply voltage, a high speed can be obtained at a low power supply voltage and a high performance chip can be realized by reducing the noise of the chip at a high power supply voltage. It has an effect.

Description

데이타 출력 버퍼Data output buffer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 데이타 출력버퍼의 회로도.2 is a circuit diagram of a data output buffer according to the present invention.

제3도는 전원전압에 대한 제2도의 노드(N7,N11)에서의 전압 변화를 나타낸 그래프도.3 is a graph showing a change in voltage at nodes N7 and N11 of FIG. 2 with respect to a power supply voltage.

Claims (8)

풀-업 드라이버단과 풀-다운 드라이버단을 포함하는 데이타 출력버퍼에 있어서, 전원전압 및 출력단자 사이에 접속되며 상기 출력단자로 흐르는 전류량을 조절하기 위한 스위치 수단과, 상기 전원전압의 변화를 감지한 신호를 출력하는 전원전압 감지수단과, 상기 전원전압 감지수단 및 스위치 수단 사이에 접속되며 상기 전원전압 감지수단으로 부터의 신호에 의해 상기 스위치 수단의 동작을 제어하는 스위칭 제어수단을 구비하는 것을 특징으로 하는 데이타 출력버퍼.A data output buffer comprising a pull-up driver stage and a pull-down driver stage, comprising: switch means connected between a power supply voltage and an output terminal and configured to adjust an amount of current flowing to the output terminal, and detecting a change in the power supply voltage; A power supply voltage sensing means for outputting a signal, and switching control means connected between the power supply voltage sensing means and the switch means and controlling the operation of the switch means by a signal from the power supply voltage sensing means. Data output buffer. 제1항에 있어서, 상기 풀-업 및 풀-다운 드라이버단이 NMOS형 트랜지스터인 것을 특징으로 하는 데이타 출력버퍼.The data output buffer according to claim 1, wherein the pull-up and pull-down driver stages are NMOS transistors. 제1항에 있어서, 상기 스위치 수단은 NMOS형 트랜지스터인 것을 특징으로 하는 데이타 출력버퍼.The data output buffer according to claim 1, wherein said switch means is an NMOS transistor. 제1항에 있어서, 상기 전원전압 감지수단은, 적어도 두개 이상의 모스다이오드에 의해 분압된 전위를 출력하는 것을 특징으로 하는 데이타 출력버퍼.The data output buffer as claimed in claim 1, wherein the power supply voltage detecting means outputs a potential divided by at least two MOS diodes. 제4항에 있어서, 상기 모스다이오드는 PMOS형 트랜지스터인 것을 특징으로 하는 데이타 출렵버퍼.5. The data start buffer according to claim 4, wherein the MOS diode is a PMOS transistor. 제1항에 있어서, 상기 전원전압 감지수단의 출력은, 상기 전원전압이 낮을 때는 낮은 전위를, 상기 전원전압이 높을 때는 이보다 높은 전위를 출력하는 것을 특징으로 하는 데이타 출력버퍼.The data output buffer according to claim 1, wherein the output of the power supply voltage sensing means outputs a low potential when the power supply voltage is low and a higher potential when the power supply voltage is high. 제1항에 있어서, 상기 스위칭 제어수단은, 상기 풀-업 드라이버단이 구동할때는 상기 스위치 수단을 턴-온시키고, 상기 풀-다운 드라이버단이 구동할때는 상기 스위치 수단을 턴-오프시키는 신호를 출력하는 것을 특징으로하는 데이타 출력버퍼.The switching control means of claim 1, wherein the switching control means outputs a signal for turning on the switch means when the pull-up driver stage is driven and turning off the switch means when the pull-down driver stage is driven. And a data output buffer. 제1항에 있어서, 상기 스위칭 제어수단은, 상기 전원전압이 낮을 때는 고전위를 출력하고, 상기 전원전압이 높을 때는 고전위-문턱전위를 뺀값을 출력하는 것을 특징으로 하는 데이타 출력버퍼.The data output buffer according to claim 1, wherein the switching control means outputs a high potential when the power supply voltage is low, and outputs a value obtained by subtracting the high potential-threshold potential when the power supply voltage is high. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950025436A 1995-08-18 1995-08-18 Data output buffer KR970013731A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950025436A KR970013731A (en) 1995-08-18 1995-08-18 Data output buffer

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Application Number Priority Date Filing Date Title
KR1019950025436A KR970013731A (en) 1995-08-18 1995-08-18 Data output buffer

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KR970013731A true KR970013731A (en) 1997-03-29

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100557591B1 (en) * 1998-10-20 2006-08-10 주식회사 하이닉스반도체 Data output buffer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100557591B1 (en) * 1998-10-20 2006-08-10 주식회사 하이닉스반도체 Data output buffer

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