KR970005687B1 - Semiconductor wafer - Google Patents
Semiconductor wafer Download PDFInfo
- Publication number
- KR970005687B1 KR970005687B1 KR92024084A KR920024084A KR970005687B1 KR 970005687 B1 KR970005687 B1 KR 970005687B1 KR 92024084 A KR92024084 A KR 92024084A KR 920024084 A KR920024084 A KR 920024084A KR 970005687 B1 KR970005687 B1 KR 970005687B1
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor wafer
- wafer
- semiconductor
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Automation & Control Theory (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Dicing (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3330933A JPH0621188A (ja) | 1991-12-13 | 1991-12-13 | 半導体ウェハ |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970005687B1 true KR970005687B1 (en) | 1997-04-18 |
Family
ID=18238061
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR92024084A KR970005687B1 (en) | 1991-12-13 | 1992-12-12 | Semiconductor wafer |
Country Status (3)
Country | Link |
---|---|
US (1) | US5477062A (ko) |
JP (1) | JPH0621188A (ko) |
KR (1) | KR970005687B1 (ko) |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3157715B2 (ja) * | 1996-05-30 | 2001-04-16 | 山形日本電気株式会社 | 半導体集積回路 |
KR100223924B1 (ko) * | 1996-07-19 | 1999-10-15 | 구본준 | 전극의 라인폭을 측정하기 위한 테스트패턴 |
US6127245A (en) * | 1997-02-04 | 2000-10-03 | Micron Technology, Inc. | Grinding technique for integrated circuits |
JP3239806B2 (ja) * | 1997-06-26 | 2001-12-17 | 株式会社村田製作所 | 電子部品の製造方法 |
US6022791A (en) * | 1997-10-15 | 2000-02-08 | International Business Machines Corporation | Chip crack stop |
KR100283030B1 (ko) * | 1997-12-31 | 2001-03-02 | 윤종용 | 반도체 장치의 레이 아웃 구조 |
JP2000036523A (ja) | 1998-07-17 | 2000-02-02 | Mitsubishi Electric Corp | マルチテスト回路を備える半導体ウェハおよびマルチテスト工程を含む半導体装置の製造方法 |
JP2001135597A (ja) * | 1999-08-26 | 2001-05-18 | Fujitsu Ltd | 半導体装置の製造方法 |
US6194739B1 (en) * | 1999-11-23 | 2001-02-27 | Lucent Technologies Inc. | Inline ground-signal-ground (GSG) RF tester |
JP3339485B2 (ja) * | 2000-01-24 | 2002-10-28 | 日本電気株式会社 | 半導体装置 |
JP3726711B2 (ja) * | 2001-05-31 | 2005-12-14 | セイコーエプソン株式会社 | 半導体装置 |
JP2002373869A (ja) * | 2001-06-13 | 2002-12-26 | Mitsubishi Electric Corp | 半導体チップ、シリコンウェハ、及び、半導体チップの製造方法 |
JP2003023138A (ja) * | 2001-07-10 | 2003-01-24 | Toshiba Corp | メモリチップ及びこれを用いたcocデバイス、並びに、これらの製造方法 |
US7259043B2 (en) * | 2002-05-14 | 2007-08-21 | Texas Instruments Incorporated | Circular test pads on scribe street area |
KR100466984B1 (ko) * | 2002-05-15 | 2005-01-24 | 삼성전자주식회사 | 테스트 소자 그룹 회로를 포함하는 집적 회로 칩 및 그것의 테스트 방법 |
US7412639B2 (en) * | 2002-05-24 | 2008-08-12 | Verigy (Singapore) Pte. Ltd. | System and method for testing circuitry on a wafer |
US6940108B2 (en) * | 2002-12-05 | 2005-09-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Slot design for metal interconnects |
US20050230005A1 (en) * | 2003-06-25 | 2005-10-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Test pad for reducing die sawing damage |
US20040262762A1 (en) * | 2003-06-25 | 2004-12-30 | Ming-Shuoh Liang | Method of providing via in a multilayer semiconductor device |
FR2875624A1 (fr) * | 2004-09-23 | 2006-03-24 | St Microelectronics Sa | Generation deterministe d'un numero d'identifiant d'un circuit integre |
JP4288229B2 (ja) * | 2004-12-24 | 2009-07-01 | パナソニック株式会社 | 半導体チップの製造方法 |
WO2007061124A1 (en) * | 2005-11-24 | 2007-05-31 | Ricoh Company, Ltd. | Semiconductor wafer including semiconductor chips divided by scribe line and process-monitor electrode pads formed on scribe line |
JP2006203215A (ja) * | 2006-01-23 | 2006-08-03 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
US7387950B1 (en) * | 2006-12-17 | 2008-06-17 | United Microelectronics Corp. | Method for forming a metal structure |
US20080246031A1 (en) * | 2007-04-09 | 2008-10-09 | Hao-Yi Tsai | PCM pad design for peeling prevention |
US20090250698A1 (en) * | 2008-04-08 | 2009-10-08 | Nagaraj Savithri | Fabrication management system |
US8017942B2 (en) * | 2008-11-25 | 2011-09-13 | Infineon Technologies Ag | Semiconductor device and method |
JP2010278141A (ja) * | 2009-05-27 | 2010-12-09 | Renesas Electronics Corp | 半導体装置及び半導体装置の検査方法 |
JP2010034595A (ja) * | 2009-11-12 | 2010-02-12 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
KR101094945B1 (ko) * | 2009-12-28 | 2011-12-15 | 주식회사 하이닉스반도체 | 반도체 장치 및 이의 프로브 테스트 방법 |
JP5976055B2 (ja) * | 2014-08-21 | 2016-08-23 | 力晶科技股▲ふん▼有限公司 | 半導体ウエハ、半導体チップ及び半導体装置とそれらの製造方法 |
US20180190549A1 (en) * | 2016-12-30 | 2018-07-05 | John Jude O'Donnell | Semiconductor wafer with scribe line conductor and associated method |
KR20200108200A (ko) * | 2019-03-08 | 2020-09-17 | 삼성디스플레이 주식회사 | 표시 셀, 이의 제조 방법 및 이에 의해 제조된 표시 장치 |
CN116338262B (zh) * | 2023-03-30 | 2023-12-12 | 胜科纳米(苏州)股份有限公司 | 一种测试盘及芯片失效分析测试的方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5422263A (en) * | 1978-07-18 | 1979-02-20 | Abaranshie Ltd | Adjustable table |
JPS61166057A (ja) * | 1985-01-17 | 1986-07-26 | Matsushita Electronics Corp | 半導体装置 |
US4695868A (en) * | 1985-12-13 | 1987-09-22 | Rca Corporation | Patterned metallization for integrated circuits |
US4835592A (en) * | 1986-03-05 | 1989-05-30 | Ixys Corporation | Semiconductor wafer with dice having briding metal structure and method of manufacturing same |
JP2652015B2 (ja) * | 1987-04-07 | 1997-09-10 | セイコーエプソン株式会社 | 半導体装置 |
US5003374A (en) * | 1988-05-23 | 1991-03-26 | North American Philips Corporation | Semiconductor wafer |
US5096855A (en) * | 1988-05-23 | 1992-03-17 | U.S. Philips Corporation | Method of dicing semiconductor wafers which produces shards less than 10 microns in size |
JPH0350732A (ja) * | 1989-07-18 | 1991-03-05 | Seiko Epson Corp | 半導体装置 |
JPH03268441A (ja) * | 1990-03-19 | 1991-11-29 | Nippon Precision Circuits Kk | 半導体集積回路基板 |
US5206181A (en) * | 1991-06-03 | 1993-04-27 | Motorola, Inc. | Method for manufacturing a semiconductor device with a slotted metal test pad to prevent lift-off during wafer scribing |
-
1991
- 1991-12-13 JP JP3330933A patent/JPH0621188A/ja active Pending
-
1992
- 1992-12-12 KR KR92024084A patent/KR970005687B1/ko not_active IP Right Cessation
-
1994
- 1994-11-15 US US08/339,923 patent/US5477062A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5477062A (en) | 1995-12-19 |
JPH0621188A (ja) | 1994-01-28 |
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Payment date: 20090807 Year of fee payment: 13 |
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