KR970004070B1 - 불휘발성 반도체메모리장치 - Google Patents
불휘발성 반도체메모리장치 Download PDFInfo
- Publication number
- KR970004070B1 KR970004070B1 KR1019890008872A KR890008872A KR970004070B1 KR 970004070 B1 KR970004070 B1 KR 970004070B1 KR 1019890008872 A KR1019890008872 A KR 1019890008872A KR 890008872 A KR890008872 A KR 890008872A KR 970004070 B1 KR970004070 B1 KR 970004070B1
- Authority
- KR
- South Korea
- Prior art keywords
- voltage
- level
- potential
- memory cell
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/32—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
Landscapes
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15687588A JP2728679B2 (ja) | 1988-06-27 | 1988-06-27 | 不揮発性半導体メモリ装置 |
| JP63-156875 | 1988-06-27 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR910001783A KR910001783A (ko) | 1991-01-31 |
| KR970004070B1 true KR970004070B1 (ko) | 1997-03-24 |
Family
ID=15637301
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019890008872A Expired - Fee Related KR970004070B1 (ko) | 1988-06-27 | 1989-06-27 | 불휘발성 반도체메모리장치 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5400279A (enExample) |
| JP (1) | JP2728679B2 (enExample) |
| KR (1) | KR970004070B1 (enExample) |
| FR (1) | FR2633433A1 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7368778B2 (en) | 2004-09-09 | 2008-05-06 | Samsung Electronics Co., Ltd. | DRAM having at least three layered impurity regions between channel holes and method of fabricating same |
| US7521348B2 (en) | 2006-10-23 | 2009-04-21 | Samsung Electronics Co., Ltd. | Method of fabricating semiconductor device having fine contact holes |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR950015768A (ko) * | 1993-11-17 | 1995-06-17 | 김광호 | 불휘발성 반도체 메모리 장치의 배선단락 검출회로 및 그 방법 |
| FR2724483B1 (fr) * | 1994-09-12 | 1996-12-27 | Sgs Thomson Microelectronics | Procede de decodage d'adresse dans une memoire en circuit integre et circuit memoire mettant en oeuvre le procede |
| US5537362A (en) * | 1994-12-06 | 1996-07-16 | National Semiconductor Corporation | Low-voltage EEPROM using charge-pumped word lines |
| JP2910644B2 (ja) * | 1995-10-31 | 1999-06-23 | 日本電気株式会社 | 半導体記憶装置 |
| KR100210846B1 (ko) * | 1996-06-07 | 1999-07-15 | 구본준 | 낸드셀 어레이 |
| US5844840A (en) * | 1997-08-19 | 1998-12-01 | Advanced Micro Devices, Inc. | High voltage NMOS pass gate having supply range, area, and speed advantages |
| US5999459A (en) * | 1998-05-27 | 1999-12-07 | Winbond Electronics Corporation | High-performance pass-gate isolation circuitry |
| JP3983940B2 (ja) * | 1999-06-28 | 2007-09-26 | 東芝マイクロエレクトロニクス株式会社 | 不揮発性半導体メモリ |
| US6258668B1 (en) * | 1999-11-24 | 2001-07-10 | Aplus Flash Technology, Inc. | Array architecture and process flow of nonvolatile memory devices for mass storage applications |
| US6891768B2 (en) * | 2002-11-13 | 2005-05-10 | Hewlett-Packard Development Company, L.P. | Power-saving reading of magnetic memory devices |
| US7978515B2 (en) * | 2007-03-23 | 2011-07-12 | Sharp Kabushiki Kaisha | Semiconductor storage device and electronic equipment therefor |
| US8509026B2 (en) * | 2012-01-10 | 2013-08-13 | Ememory Technology Inc. | Word line boost circuit |
| JP5657063B2 (ja) * | 2013-07-01 | 2015-01-21 | ウィンボンド エレクトロニクス コーポレーション | 半導体記憶装置 |
| US9608615B2 (en) * | 2015-06-12 | 2017-03-28 | Cypress Semiconductor Corporation | Negative high voltage hot switching circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5771587A (en) * | 1980-10-22 | 1982-05-04 | Toshiba Corp | Semiconductor storing device |
| JPS62219296A (ja) * | 1986-03-20 | 1987-09-26 | Hitachi Ltd | 半導体集積回路装置 |
| US5008856A (en) * | 1987-06-29 | 1991-04-16 | Kabushiki Kaisha Toshiba | Electrically programmable nonvolatile semiconductor memory device with NAND cell structure |
-
1988
- 1988-06-27 JP JP15687588A patent/JP2728679B2/ja not_active Expired - Lifetime
-
1989
- 1989-06-27 KR KR1019890008872A patent/KR970004070B1/ko not_active Expired - Fee Related
- 1989-06-27 FR FR8908558A patent/FR2633433A1/fr active Granted
-
1993
- 1993-05-26 US US08/067,005 patent/US5400279A/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7368778B2 (en) | 2004-09-09 | 2008-05-06 | Samsung Electronics Co., Ltd. | DRAM having at least three layered impurity regions between channel holes and method of fabricating same |
| US7521348B2 (en) | 2006-10-23 | 2009-04-21 | Samsung Electronics Co., Ltd. | Method of fabricating semiconductor device having fine contact holes |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2633433A1 (fr) | 1989-12-29 |
| US5400279A (en) | 1995-03-21 |
| JPH027295A (ja) | 1990-01-11 |
| FR2633433B1 (enExample) | 1995-02-03 |
| JP2728679B2 (ja) | 1998-03-18 |
| KR910001783A (ko) | 1991-01-31 |
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