KR960036155A - 피.엘.티. 박막 제조방법 - Google Patents

피.엘.티. 박막 제조방법 Download PDF

Info

Publication number
KR960036155A
KR960036155A KR1019950004501A KR19950004501A KR960036155A KR 960036155 A KR960036155 A KR 960036155A KR 1019950004501 A KR1019950004501 A KR 1019950004501A KR 19950004501 A KR19950004501 A KR 19950004501A KR 960036155 A KR960036155 A KR 960036155A
Authority
KR
South Korea
Prior art keywords
thin film
gas
source material
reaction chamber
temperature
Prior art date
Application number
KR1019950004501A
Other languages
English (en)
Other versions
KR0179101B1 (ko
Inventor
이승석
김호기
김종철
최수한
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950004501A priority Critical patent/KR0179101B1/ko
Priority to TW084114027A priority patent/TW359045B/zh
Priority to JP7355047A priority patent/JP2778941B2/ja
Priority to DE19549129A priority patent/DE19549129C2/de
Priority to GB9526698A priority patent/GB2298736A/en
Priority to CN95119481A priority patent/CN1060224C/zh
Publication of KR960036155A publication Critical patent/KR960036155A/ko
Application granted granted Critical
Publication of KR0179101B1 publication Critical patent/KR0179101B1/ko

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0272Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • C23C16/0281Deposition of sub-layers, e.g. to promote the adhesion of the main coating of metallic sub-layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/409Oxides of the type ABO3 with A representing alkali, alkaline earth metal or lead and B representing a refractory metal, nickel, scandium or a lanthanide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Inorganic Chemistry (AREA)
  • Electromagnetism (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 PLT 박막 제조방법에 관한 것으로, 실리콘산화막(111) 배향성 금속박막이 형성된 웨이퍼를 반응챔버에 장입시키고 상기 반응챔버를 고진공으로 유지하는 동시에 상기 반응챔버를 증착가능한 온도로 세팅시킨 다음, 소오스 운반가스를 일정량 유입시키고 희석 가스와 산화가스를 일정량 유입시키며 박막을 증착함으로써 전기적특성과 물리적특성이 우수한(100) 배향성 PLT 박막을 형성하여 반도체소자의 특성향상 및 반도체소자의 고집적화를 가능하게 하는 기술이다.

Description

피.엘.티. 박막 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1도는 본 발명의 실시예에서 사용되는 박막 증착장비 개략도.

Claims (26)

  1. 핫-월 방식을 이용한 반도체소자의 PLT 박막 제조방법에 있어서, (111) 배향성 금속박막을 형성하는 공정과, 상기 (111) 배향성 금속박막 상부에 (100) 배향성 PLT 박막을 형성하는 공정을 포함하는 PLT 박막 제조방법.
  2. 제 1항에 있어서, 상기 (111) 배향성 금속박막은 실리콘기판 상부에 실리콘산화막을 일정두께 형성하고 상기 실리콘산화막 상부에 형성되는 것을 특징으로 하는 PLT 박막 제조방법.
  3. 제 2항에 있어서, 상기 실리콘산화막은 900 내지 1100Å 두께로 형성되는 것을 특징으로 하는 PLT 박막 제조방법.
  4. 제 1항에 있어서, 상기 (111) 배향성 금속박막은 Pt로 형성되는 것을 특징으로 하는 PLT 박막 제조방법.
  5. 제 1항에 있어서, 상기 (111) 배향성 금속박막은 500 내지 4000Å 두께로 형성되는 것을 특징으로 하는 PLT 박막 제조방법.
  6. 제 1항에 있어서, 상기 (111) 배향성 금속박막은 반응챔버 내부압력 5×10-6Torr, 공정진행시 압력 8 내지 12mTorr, 전력 23 내지 27 와트(Watt), 기판온도 380 내지 420℃의 증착조건하에서 십분간 유지한 다음 스퍼터링공정으로 증착되는 것을 특징으로 하는 PLT 박막 제조방법.
  7. 제 1항에 있어서, 상기 (100) 배향성 PLT 박막은 반응챔버에 웨이퍼를 장입시키는 공정과, 상기 반응챔버를 고진공으로 유지하는 동시에 상기 반응챔버의 온도를 세팅시키는 공정과, 상기 반응챔버에 소오스물질 운반가스를 일정량 유입시키되, 가스분사기를 이용하여 유입시키는 공정과, 상기 반응챔버에 희석가스와 산화가스를 일정량 유입시키며 박막을 증착시키는 공정으로 형성되는 것을 특징으로 하는 PLT 박막 제조방법.
  8. 제 7항에 있어서, 상기 소오스물질은 증기압이 큰 물질로 사용되는 것을 특징으로 하는 PLT 박막 제조방법.
  9. 제 7항 또는 제 8항에 있어서, 상기 소오스물질은 Pb(dpm)3, La(dpm)3, TTIP 및 산소가스가 사용되는 것을 특징으로 하는 PLT 박막 제조방법.
  10. 제 9항에 있어서, 상기 소오스물질은 La(dpm)3, TTIP 및 산소가스가 사용되는 것을 특징으로 하는 PLT 박막 제조방법.
  11. 제 10항에 있어서, 상기 소오스물질을 이용한 증착공정은 PbTiO3박막이 증착되는 것을 특징으로 하는 PLT 박막 제조방법.
  12. 제 9항에 있어서, 상기 소오스물질은 Pb(dpm)3, La(dpm)3, Zr(dpm)3, TTIP, Zr-부트옥사이드 및 산소가스가 사용되는 것을 특징으로 하는 PLT 박막 제조방법.
  13. 제 12항에 있어서, 상기 소오스물질을 이용한 증착공정은 PLZT 박막이 증착되는 것을 특징으로 하는 PLT 박막 제조방법.
  14. 제 7항에 있어서, 상기 소오스물질이 담기는 증발기는 소오스물질에 따라 온도를 조절하되, 상기 소오스물질이 Pb이면 130 내지 180℃, 상기 소오스물질이 La이면 150 내지 250℃ 그리고 상기 소오스물질이 TTIP이면 20 내지 90℃의 온도로 유지되는 것을 특징으로 하는 PLT 박막 제조방법.
  15. 제 7항에 있어서, 상기 증발기의 반응챔버를 연결하는 가스유도관은 각 증발기 최고온도보다 20℃ 높게 온도조절되는 것을 특징으로 하는 PLT 제조방법.
  16. 제 7항에 있어서, 상기 웨이퍼는 상기 반응챔버의 균일한 온도영역 내에 위치시키며 증착되는 박막의 두께 및 조성의 균일도 확보를 위하여 90 내지 0도로 기울려 설치되는 것을 특징으로 하는 PLT 박막 제조방법.
  17. 제 7항에 있어서, 상기 고진공은 50mTorr 이하인 것을 특징으로 하는 PLT 박막 제조방법.
  18. 제 7항에 있어서, 상기 반응챔버의 온도는 증착온도인 400 내지 700℃로 세팅되는 것을 특징으로 하는 PLT 박막 제조방법.
  19. 제 7항에 있어서, 상기 운반가스는 아르곤이나 질소가스가 사용되는 것을 특징으로 하는 PLT 박막 제조방법.
  20. 제 19항에 있어서, 상기 운반가스 유량은 소오스물질에 따라 다르며 1 내지 300sccm인 것을 특징으로 하는 PLT 박막 제조방법.
  21. 제 7항에 있어서, 상기 가스분사기는 상기 소오스물질의 분해에 이온 산화반응을 억제시키기 위하여 200 내지 300℃로 유지되는 것을 특징으로 하는 PLT 박막 제조방법.
  22. 제 7항에 있어서, 상기 희석가스는 아르곤가스나 질소가스가 사용되는 것을 특징으로 하는 PLT 박막 제조방법.
  23. 제 22항에 있어서, 상기 희석가스의 유량범위는 0 내지 10 slpm인 것을 특징으로 하는 PLT 박막 제조방법.
  24. 제 7항에 있어서, 상기 산화가스는 산소가스나 오존가스가 사용되는 것을 특징으로 하는 PLT 박막 제조방법.
  25. 제 22항에 있어서, 상기 산화가스의 유량범위는 0 내지 10 slpm인 것을 특징으로 하는 PLT 박막 제조방법.
  26. 제 1항에 있어서, 상기 PLT 박막은 1000 내지 1800Å 두께로 증착되는 것을 특징으로 하는 PLT 박막 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950004501A 1995-03-06 1995-03-06 피.엘.티. 박막 제조방법 KR0179101B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019950004501A KR0179101B1 (ko) 1995-03-06 1995-03-06 피.엘.티. 박막 제조방법
TW084114027A TW359045B (en) 1995-03-06 1995-12-28 Method for forming PLT thin film
JP7355047A JP2778941B2 (ja) 1995-03-06 1995-12-28 P.l.t.薄膜製造方法
DE19549129A DE19549129C2 (de) 1995-03-06 1995-12-29 Verfahren zur Ausbildung einer (100)-orientierten PLT Dünnschicht
GB9526698A GB2298736A (en) 1995-03-06 1995-12-29 Method for forming plt and plzt thin films
CN95119481A CN1060224C (zh) 1995-03-06 1995-12-29 钛酸镧铅薄膜的形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950004501A KR0179101B1 (ko) 1995-03-06 1995-03-06 피.엘.티. 박막 제조방법

Publications (2)

Publication Number Publication Date
KR960036155A true KR960036155A (ko) 1996-10-28
KR0179101B1 KR0179101B1 (ko) 1999-03-20

Family

ID=19409259

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950004501A KR0179101B1 (ko) 1995-03-06 1995-03-06 피.엘.티. 박막 제조방법

Country Status (6)

Country Link
JP (1) JP2778941B2 (ko)
KR (1) KR0179101B1 (ko)
CN (1) CN1060224C (ko)
DE (1) DE19549129C2 (ko)
GB (1) GB2298736A (ko)
TW (1) TW359045B (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960015375B1 (ko) * 1994-06-08 1996-11-11 현대전자산업 주식회사 강유전체 박막 제조장치 및 그를 사용한 강유전체 박막 제조방법
DE19733053A1 (de) * 1997-07-31 1999-02-04 Leybold Ag Transparentes Substrat
JPH11288893A (ja) 1998-04-03 1999-10-19 Nec Corp 半導体製造装置及び半導体装置の製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910005405Y1 (ko) * 1988-08-13 1991-07-25 다나신 덴기 가부시끼가이샤 디스크형 기록매체 로오딩 장치
JP2718414B2 (ja) * 1989-03-30 1998-02-25 マツダ株式会社 チタン酸鉛薄膜の製造方法
JPH04199745A (ja) * 1990-11-29 1992-07-20 Matsushita Electric Ind Co Ltd メモリ素子
JPH059738A (ja) * 1991-06-27 1993-01-19 Mitsubishi Electric Corp 強誘電性セラミツクス薄膜の製造方法
US5431958A (en) * 1992-03-09 1995-07-11 Sharp Kabushiki Kaisha Metalorganic chemical vapor deposition of ferroelectric thin films

Also Published As

Publication number Publication date
DE19549129A1 (de) 1996-09-12
GB9526698D0 (en) 1996-02-28
KR0179101B1 (ko) 1999-03-20
JP2778941B2 (ja) 1998-07-23
GB2298736A (en) 1996-09-11
TW359045B (en) 1999-05-21
DE19549129C2 (de) 2001-10-31
JPH08283098A (ja) 1996-10-29
CN1060224C (zh) 2001-01-03
CN1133349A (zh) 1996-10-16

Similar Documents

Publication Publication Date Title
US4804640A (en) Method of forming silicon and aluminum containing dielectric film and semiconductor device including said film
US6313035B1 (en) Chemical vapor deposition using organometallic precursors
CN101208782B (zh) 用于等离子氮化栅极介电层的氮化后二阶段退火的方法
US5695819A (en) Method of enhancing step coverage of polysilicon deposits
US4692344A (en) Method of forming a dielectric film and semiconductor device including said film
US4675089A (en) Low temperature deposition method for high quality aluminum oxide films
US4588610A (en) Photo-chemical vapor deposition of silicon nitride film
US20020001974A1 (en) Method for manufacturing zirconium oxide film for use in semiconductor device
JPH1187341A (ja) 成膜方法及び成膜装置
KR20080011236A (ko) 유전체 물질의 플라즈마 처리
KR20020001376A (ko) 반도체 소자의 알루미늄 산화막 형성 방법
JP2789587B2 (ja) 絶縁薄膜の製造方法
JP3502504B2 (ja) 酸化ケイ素層の析出方法
US6635571B2 (en) Process for forming aluminum or aluminum oxide thin film on substrates
KR100510473B1 (ko) 원자층 증착법을 이용한 반도체소자의 커패시터 상부 전극 형성방법
EP0388957A2 (en) Process for depositing tantalum oxide film and chemical vapor deposition system used therefore
Ishihara et al. Laser-assisted chemical vapor deposition of titanium nitride films
KR960036155A (ko) 피.엘.티. 박막 제조방법
KR20010088207A (ko) 탄탈륨산화막-티타늄산화막 복합유전막 형성방법
US6232234B1 (en) Method of reducing in film particle number in semiconductor manufacture
JP3270879B2 (ja) 高誘電体薄膜の形成方法
KR100382370B1 (ko) 어닐링장치의 서셉터 전처리방법
KR0172857B1 (ko) 화학기상 증착에 의한 박막형성방법
JPS6358843A (ja) 半導体装置
EP0648859B1 (en) Processes for the deposition of adherent tungsten silicide films

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20091028

Year of fee payment: 12

LAPS Lapse due to unpaid annual fee