KR960026614A - 반도체소자의 전하저장전극 제조방법 - Google Patents

반도체소자의 전하저장전극 제조방법 Download PDF

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Publication number
KR960026614A
KR960026614A KR1019940040536A KR19940040536A KR960026614A KR 960026614 A KR960026614 A KR 960026614A KR 1019940040536 A KR1019940040536 A KR 1019940040536A KR 19940040536 A KR19940040536 A KR 19940040536A KR 960026614 A KR960026614 A KR 960026614A
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South Korea
Prior art keywords
charge storage
storage electrode
forming
polysilicon layer
layer pattern
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KR1019940040536A
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English (en)
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엄금용
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김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940040536A priority Critical patent/KR960026614A/ko
Publication of KR960026614A publication Critical patent/KR960026614A/ko

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체소자의 전하저장전극 제조방법에 관한 것으로서, 반도체기판상에 일련의 소자분리 절연막과 게이트전극과 비트라인등을 형성하고, 전하저장전극 콘택홀을 형성한 후, 상기 전하저장전극 콘택홀을 통상의 안정적인 제1다결정실리콘층 패턴으로 메워 판도체기판과 접촉시키고, 상기 제1다결정실리콘층 패턴과 접촉되는 제2단결정실리콘층을 형성하되, 상기 제2다결정실리콘층에는 식각 가능할 정도로 다량의 SiOx/SiO2등과 같은 실리콘 석출물이 포함되도록 하고, 상기 실리콘 석출물을 BOE 용액으로 선택적으로 제거하여 상기 제2다결정실리콘층에 다수개의 핀홀을 형성하여 제1 및 제2다결정실리콘층 패턴으로 된 전하저장전극을 형성하였으므로, 핀홀들에 의해 전하저장전극의 표면적이 증가되어 소자동작의 신뢰성이 증가되고, 소자의 고집적화에 유리하다.

Description

반도체소자의 전하저장전극 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도 내지 제1C도는 본 발명에 따른 반도체소자의 전하저장전극 제조 공정도.

Claims (4)

  1. 반도체기판상에 게이트산화막을 형성하는 공정과, 상기 게이트산화막 상에 게이트전극을 형성하는 공정과, 상기 게이트전극 양측 하부의 반도체기판에 소오스/드레인전극을 형성하는 공정과, 상기 구조의 전표면에 층간절연막을 형성하는 공정과, 상기 소오스/드레인전극에서 전하저장전극 콘택으로 예정되어 있는 부분 상측의 층간절연막을 제거하여 전하저장전극 콘택홀을 형성하는 공정과, 상기 전하저장전극 콘택홀을 제1다결정실리콘층 패턴으로 메우는 공정과, 상기 제1다결정실리콘층 패턴과 접촉되며, 예정된 비율의 실리콘 석출물을 포함하는 제2다결정실리콘층 패턴을 형성하는 공정과, 상기 제2다결정실리콘층 패턴내의 실리콘 석출물을 제거하여 다수개의 핀홀을 형성하는 공정을 구비하는 반도체소자의 전하저장전극 제조방법.
  2. 제1항에 있어서, 상기 제1다결정실리콘층을 Si2H6가스를 사용하여 550~650℃에서 형성하는 것을 특징으로 하는 반도체소자의 전하저장전극 제조방법.
  3. 제1항에 있어서, 상기 제2다결정실리콘층을 SiH4+2N2O+N2가스를 사용하여 형성하는 것을 특징으로 하는 반도체소자의 전하저장전극 제조방법.
  4. 제1항에 있어서, 상기 실리콘 석출물 식각공정을 BOE 용액으로 식각하는 것을 특징으로 하는 반도체소자의 전하저장전극 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940040536A 1994-12-31 1994-12-31 반도체소자의 전하저장전극 제조방법 KR960026614A (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940040536A KR960026614A (ko) 1994-12-31 1994-12-31 반도체소자의 전하저장전극 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940040536A KR960026614A (ko) 1994-12-31 1994-12-31 반도체소자의 전하저장전극 제조방법

Publications (1)

Publication Number Publication Date
KR960026614A true KR960026614A (ko) 1996-07-22

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Application Number Title Priority Date Filing Date
KR1019940040536A KR960026614A (ko) 1994-12-31 1994-12-31 반도체소자의 전하저장전극 제조방법

Country Status (1)

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KR (1) KR960026614A (ko)

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