KR960003859B1 - Method of making a capacitor for a semiconductor device - Google Patents

Abstract

forming a storage electrode contact hole by forming a first insulation layer(5) on a transistor and etching its predetermined portion; depositing a first polysilicon layer(7), a second insulation film(8), a second polysilicon layer(9) and a third insulation film(10) on entire surface of resulting structure in turn; forming a photosensitive film pattern(11) for cavity mask on the third insulation film(10); forming a third insulation film pattern, a second polysilicon layer pattern and a second insulation film pattern in turn by etching process, and removing the photosensitive film pattern; depositing a third polysilicon layer(12) on entire surface of resulting structure, and forming a photosensitive film pattern(13) for storage electrode mask thereon; exposing the second and third insulation film patterns, and forming first and second cavities(14,15) by removing their exposed patterns by wet etching process; and forming a storage electrode(20) having first and second cavities and consisting of first, second and third polysilicon layers by forming a first polysilicon layer pattern and removing the photosensitive film pattern for storage electrode mask.

Description

Capacitor Manufacturing Method of Semiconductor Device

1 to 6 are cross-sectional views showing a storage electrode manufacturing step of a capacitor according to the present invention.

* Explanation of symbols for main parts of the drawings

1: silicon substrate 2: field conversion membrane

3: word line 4: insulating film spacer

5: first insulating film 6: nitride film

7: first polysilicon layer 8: second insulating film

9: 2nd polysilicon layer 10: 3rd insulating film

11: photosensitive film pattern for cavity mask 12: third polysilicon layer

13 photosensitive film pattern for the storage electrode mask 14 first cavity

15: second cavity 20: storage electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a highly integrated semiconductor device, and more particularly, to a method for manufacturing a storage electrode having first and second cavity structures in order to maximize the surface area of a storage electrode of a DRAM cell capacitor.

As the DRAM cells become more integrated, the area occupied by the capacitors gradually decreases. Therefore, conventionally, the storage electrode of the cavity structure or the fin structure is formed, but in the cavity structure according to the prior art, it is possible to increase the capacity only by increasing the intermediate insulation film, but the increase in the capacitor capacity is small compared to the step difference. .

In addition, in order to increase the capacity of the fin structure to increase the length of the pin, which has a lot of difficulties in the manufacturing process. That is, it is difficult to process the fin after the dry etching and the wet etching process, and increasing the length of the fin also has the problem of adverse effect on high integration.

Accordingly, an object of the present invention is to provide a method of forming storage electrodes having first and second cavity structures stacked in order to increase capacitor capacity.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

1 to 6 are cross-sectional views illustrating a step of forming a storage electrode having first and second cavity structures according to the present invention.

Referring to FIG. 1, a field oxide film 2 is formed in a predetermined portion of a silicon substrate 1, a word line 3 passing through an active region and an upper portion of a field region is formed, and an insulating film spacer is formed on the sidewall of the word line 3. (4), and then, the first insulating film 5 is thickened by, for example, BPSG, and the like to be planarized on the entire structure, and the nitride film 6 is deposited on the first insulating film 5 and stored. A charge storage electrode contact hole for exposing the silicon substrate 1 is formed by removing a portion of the nitride film 6 and the first insulating film 5 using an electrode contact mask.

Then, the first polysilicon layer 7, the second insulating film 8, the second polysilicon layer 9, and the third insulating film 10 are sequentially stacked on the entire structure.

In this case, the third and second insulating films 10 and 8 may be formed of oxide films.

Note that the word line 3 is formed and the source / drain is formed in the silicon substrate 1.

FIG. 2 is a cross-sectional view of the cavity mask photosensitive film pattern 11 formed on the third insulating film 10 in the contact hole portion.

3 illustrates that the second polysilicon layer 9 and the second insulating film 8 are sequentially etched using the third insulating film 10 exposed using the photosensitive film pattern 11 as a mask to form the second insulating film pattern 8A. And a second polysilicon layer pattern 9A and a third insulating film pattern 10A, and then the photosensitive film pattern 11 for cavity mask is removed.

4 shows that after the third polysilicon layer 12 is deposited on the entire structure after the process of FIG. 3, the photoresist pattern 13 for the storage electrode mask is formed on the third polysilicon layer 12 above the contact hole. ) Is formed, but is larger than the size of the cavity mask photoresist pattern 11.

FIG. 5 is a view illustrating etching of the third polysilicon layer 12 exposed by the photoresist pattern 13 to form a third polysilicon layer pattern 12A, and then having cross-sections exposed before and after, although not shown in the drawing. The first and second cavities 14 and 15 are formed by removing the second insulating film pattern 8A and the third insulating film pattern 10A by wet etching.

FIG. 6 illustrates the etching of the first polysilicon layer 7 exposed after the process of FIG. 5, but using the nitride film 6 as an etch stop layer to form a first polysilicon layer pattern 7A. The photosensitive film pattern 13 is removed to form a storage electrode 20 having the first cavity 14 and the second cavity 15.

Subsequently, although not shown, a dielectric film is formed on an outer surface of the storage electrode 20 and an inner surface of the cavity, and a plate electrode is formed on the surface of the capacitor to manufacture the capacitor.

According to the present invention described above, the structure of the storage electrode of the DRAM cell can be formed in a double cavity structure to increase the capacitance of the capacitor and contribute to high integration.

Claims (2)

In the method of manufacturing a capacitor of a semiconductor device, forming a first insulating layer on the transistor formed on the silicon substrate to planarize, and then forming a storage electrode contact hole for exposing the silicon substrate by etching a predetermined portion of the first insulating film And sequentially laminating a first polysilicon layer, a second insulating film, a second polysilicon layer, and a third insulating film on a predetermined thickness on the entire structure, and the photoresist film for the cavity mask on the third insulating layer. Forming a pattern, and sequentially etching the third insulating film, the second polysilicon layer, and the second insulating film using the photoresist pattern as a mask to form the third insulating film pattern, the second polysilicon layer pattern, and the second insulating film pattern. Forming, removing the photoresist pattern, depositing a third polysilicon layer on the entire structure, and storing the storage electrode thereon. Forming a mask photoresist pattern, and removing the third polysilicon layer exposing the photoresist pattern for the storage electrode mask as a mask to form a third polysilicon layer pattern, wherein the second and third insulating layers Exposing the pattern, removing the exposed second and third insulating film patterns by a wet etching process to form a first cavity and a second cavity, and a first polysilicon layer exposed by the photosensitive film pattern. Forming a first polysilicon layer turn to remove the storage electrode mask photoresist pattern to form a storage electrode having a first cavity, a second cavity, and a first, second, and third silicon layer pattern. A method for manufacturing a capacitor of a semiconductor device, characterized in that. The method of claim 1, wherein a nitride film is formed between the first insulating film and the first polysilicon layer to serve as an etch stop layer of the first polysilicon layer.