KR960013634B1 - Capacitor manufacture of semiconductor device - Google Patents

Abstract

The method of manufacturing capacitor comprises the steps of : depositing a first insulating layer(2), a first poly layer(3) and a second insulating layer(4) on a semiconductor substrate(1), and forming a first photoresist pattern(5) for a storage electrode contact mask; forming a contact hole(6) by etching; forming a second poly layer pad(7A) by etch back of a second poly layer(7); exposing the top of the second poly layer pad(7A) by removing the exposed second insulating layer(4); depositing a third insulating layer(8) for a cavity, and forming a second photoresist pattern(9) for a cavity pattern mask; forming a third insulating layer pattern(8A), removing the second photoresist pattern(9), depositing a third poly layer(10) and forming a third photoresist pattern(11) for a storage electrode mask; forming a storage electrode(20) where the first, the second and the third poly layer(3,7,10) are connected electrically, and forming the storage electrode(20) comprising a cylindrical cavity(12); and forming a dielectric film(13) and a plate electrode(14) on the outer surface of the storage electrode(20) and on the surface of the cavity(12).

Description

Capacitor Manufacturing Method of Semiconductor Device

1 is a cross-sectional view showing a method for manufacturing a semiconductor device according to the prior art.

2A to 2I are cross-sectional views illustrating a manufacturing process of a capacitor of a semiconductor device according to an embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

1 silicon substrate 2 first insulating layer

3: first poly layer 4: second insulating layer

5: first photosensitive film pattern 6: contact hole

7: first polylayer 7A: second polylayer pad

8: third insulating layer 8A: third insulating layer pattern

9: second photosensitive film pattern 10: third poly layer

11: third photosensitive film pattern 12: cavity (cavity)

13 dielectric film 14 poly layer for plate electrodes

20: storage electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device, and more particularly, to a technology for manufacturing a capacitor having a columnar cavity structure in order to increase the capacity of the capacitor.

Conventionally, various capacitor structures have been improved in order to increase the capacitor capacity, but the following is a capacitor having a cavity structure similar to the stack capacitor structure of the DRAM cell.

A method of manufacturing a capacitor of a semiconductor device according to the prior art will be described with reference to FIG.

FIG. 1 illustrates a cavity of a storage electrode 20 connected to a drain (not shown) of a mobile transistor, and a capacitor dielectric layer 13 formed on an inner surface of the cavity of the storage electrode 20 and an outer surface of the storage electrode 20. ) And a plate electrode poly layer 14 is formed inside the cavity of the storage electrode 20 and outside the storage electrode 20, and at one edge of the storage electrode 20, the inside and the outside of the storage electrode 20 are formed. The polyelectrodes for plate electrodes in the structure may be formed in an interconnected structure to increase the capacity of a conventional stack capacitor.

However, the capacitor of the above-described cavity structure has a problem in that the ultracapacitive device has insufficient capacitor capacity and thus it is difficult to secure a sufficient capacitance for high integration of the semiconductor device, making it difficult to integrate the semiconductor device.

Accordingly, an object of the present invention is to provide a method of manufacturing a capacitor of a semiconductor device capable of securing a capacitance sufficient for high integration of a semiconductor device by forming a capacitor in a columnar cavity structure.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2A through 2I are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device in accordance with an embodiment of the present invention.

2A illustrates a first insulating layer 2, a first poly layer 3, and a second layer to form a use transistor (not shown) on the silicon substrate 1, and to form a storage electrode contacting a predetermined train electrode. After the insulating layers are formed to have predetermined thicknesses, the first photosensitive film pattern 5 for the storage electrode contact mask is formed. In this case, the first and second insulating layers 2 and 4 are formed of an oxide film.

2B illustrates a contact in which the silicon substrate 1 is exposed by etching the second insulating layer 4, the first poly layer 3, and the first insulating layer 2 by using the first photoresist pattern 5 as a mask. After forming the hole 6, it is sectional drawing which carried the 1st photosensitive film pattern 5. FIG.

FIG. 2C is a cross-sectional view of the state in which the second poly layer 7 is etched back and the upper portion of the second insulating layer 4 is deposited to a predetermined thickness.

In FIG. 2D, the second poly layer 7 is etched back, and the second surface of the second insulating layer 4 is removed until the top surface of the second insulating layer 4 is exposed to form a second poly layer pad 7A embedded in the contact hole 6. One cross section.

2E is a cross-sectional view of the second polylayer pad 7A protruding by removing the second insulating layer 4.

2F is a cross-sectional view in which a third insulating layer 8, for example, an oxide film is formed to a predetermined thickness and a second photosensitive film pattern 9 for a cavity pattern mask is formed thereon.

In FIG. 2G, the third insulating layer pattern 8A for the cavity is formed by etching the exposed third insulating layer 8 using the second photosensitive film pattern 9 as a mask after the process of FIG. 2F, and the second photoresist pattern After (9), the third poly layer 10 is deposited on the entire structure, and the third photosensitive film pattern 11 for the storage electrode mask is formed thereon.

FIG. 2H shows the first, second, and third poly layers 3, 7, and 10 by removing the exposed third poly layer 10 using the third photoresist pattern 11 as a mask after the process of FIG. 2G. To form the storage electrode 20, the third photoresist pattern 11 is removed, and the third insulating layer pattern 8A for the cavity is removed by wet etching to form the cavity 12 inside the storage electrode 20. It is sectional drawing of the state formed. The cavity 12 is formed in a tunnel shape.

2I illustrates a capacitor dielectric layer 13 formed along the outer surface of the storage electrode 20 and the inner surface of the cavity 12, and the polyelectrode 14 for plate electrodes 14 is formed inside the storage electrode 20. It is sectional view of the state formed.

Here, the effective area of the capacitor shown in FIG. 2I is a portion in which the capacitor dielectric film is formed, and it can be seen that the surface area is increased by the protruding cylindrical second poly layer pad.

As described above, the method of manufacturing the capacitor of the semiconductor device according to the present invention can secure the capacitor capacity applicable to the next-generation 64 mega DRAM or 256 mega DRAM class devices.

Claims (2)

In the method of manufacturing a DRAM cell capacitor of a semiconductor device for increasing the capacity of a capacitor having a cavity structure, the first insulating layer, the first poly layer, and the second insulating layer are laminated on the silicon substrate on which the mobile transistor is formed, respectively, to a predetermined thickness. And forming a first photoresist pattern for a storage electrode contact mask, forming a contact hole exposing the silicon substrate by etching the second square layer, the first poly layer, and the first insulating layer. Depositing a second poly layer on the hole and forming a second poly layer pad embedded in the contact hole by an etch back process; and removing the second insulating layer exposed by the etch back process. Exposing an upper portion of the second insulating layer pad, forming a third insulating layer for a cavity in a predetermined thickness on the entire structure, and forming a second photoresist pattern for a cavity pattern mask; The third insulating layer is etched using the second photoresist pattern as a mask to form a third insulating layer pattern for a cavity, the second photoresist pattern is removed, and a third poly layer is deposited on the entire structure, and then stored. A process of forming a third photoresist pattern for an electrode mask and etching the third poly layer using the third photoresist pattern as a mask to form a storage electrode electrically connected to the first, second, and third poly layers; And removing the third photoresist layer pattern, removing the third insulating layer pattern for the cavity to form a storage electrode having a columnar cavity, and forming a dielectric film and a plate electrode on the outer surface and the cavity surface of the storage electrode. Capacitor manufacturing method of a semiconductor device comprising the step of sequentially forming. The method of claim 1, wherein the first, second, and third insulating films are formed of an oxide film.