KR960003595B1 - 집적 반도체 회로 - Google Patents
집적 반도체 회로 Download PDFInfo
- Publication number
- KR960003595B1 KR960003595B1 KR1019920004472A KR920004472A KR960003595B1 KR 960003595 B1 KR960003595 B1 KR 960003595B1 KR 1019920004472 A KR1019920004472 A KR 1019920004472A KR 920004472 A KR920004472 A KR 920004472A KR 960003595 B1 KR960003595 B1 KR 960003595B1
- Authority
- KR
- South Korea
- Prior art keywords
- channel transistor
- circuit
- boost
- signal
- integrated semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Radar, Positioning & Navigation (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Automation & Control Theory (AREA)
- Nonlinear Science (AREA)
- Power Engineering (AREA)
- Dram (AREA)
- Logic Circuits (AREA)
- Read Only Memory (AREA)
- Dc-Dc Converters (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3051874A JPH04287418A (ja) | 1991-03-18 | 1991-03-18 | 半導体集積回路 |
| JP91-051874 | 1991-03-18 | ||
| JP91-51874 | 1991-03-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920018758A KR920018758A (ko) | 1992-10-22 |
| KR960003595B1 true KR960003595B1 (ko) | 1996-03-20 |
Family
ID=12899032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019920004472A Expired - Fee Related KR960003595B1 (ko) | 1991-03-18 | 1992-03-18 | 집적 반도체 회로 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5187397A (enExample) |
| EP (1) | EP0505158A2 (enExample) |
| JP (1) | JPH04287418A (enExample) |
| KR (1) | KR960003595B1 (enExample) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3122239B2 (ja) * | 1992-07-23 | 2001-01-09 | 株式会社東芝 | 半導体集積回路 |
| KR0130040B1 (ko) * | 1993-11-09 | 1998-10-01 | 김광호 | 반도체 집적회로의 전압 승압회로 |
| GB9423035D0 (en) * | 1994-11-15 | 1995-01-04 | Sgs Thomson Microelectronics | Voltage boost circuit for a memory device |
| KR0137317B1 (ko) * | 1994-12-29 | 1998-04-29 | 김광호 | 반도체 메모리소자의 활성싸이클에서 사용되는 승압회로 |
| JP3094913B2 (ja) * | 1996-06-19 | 2000-10-03 | 日本電気株式会社 | 半導体回路 |
| JP2956645B2 (ja) * | 1997-04-07 | 1999-10-04 | 日本電気株式会社 | 半導体装置 |
| US5933386A (en) * | 1997-12-23 | 1999-08-03 | Mitsubishi Semiconductor America, Inc. | Driving memory bitlines using boosted voltage |
| US6885275B1 (en) | 1998-11-12 | 2005-04-26 | Broadcom Corporation | Multi-track integrated spiral inductor |
| US6445039B1 (en) | 1998-11-12 | 2002-09-03 | Broadcom Corporation | System and method for ESD Protection |
| WO2000042659A2 (en) | 1999-01-15 | 2000-07-20 | Broadcom Corporation | System and method for esd protection |
| US7687858B2 (en) | 1999-01-15 | 2010-03-30 | Broadcom Corporation | System and method for ESD protection |
| US8405152B2 (en) | 1999-01-15 | 2013-03-26 | Broadcom Corporation | System and method for ESD protection |
| US6671816B1 (en) | 1999-06-29 | 2003-12-30 | Broadcom Corporation | System and method for independent power sequencing of integrated circuits |
| US7439592B2 (en) | 2004-12-13 | 2008-10-21 | Broadcom Corporation | ESD protection for high voltage applications |
| US7505238B2 (en) | 2005-01-07 | 2009-03-17 | Agnes Neves Woo | ESD configuration for low parasitic capacitance I/O |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3983414A (en) * | 1975-02-10 | 1976-09-28 | Fairchild Camera And Instrument Corporation | Charge cancelling structure and method for integrated circuits |
| US4092548A (en) * | 1977-03-15 | 1978-05-30 | International Business Machines Corporation | Substrate bias modulation to improve mosfet circuit performance |
| JPS62136919A (ja) * | 1985-12-10 | 1987-06-19 | Mitsubishi Electric Corp | ドライバ−回路 |
| GB2226727B (en) * | 1988-10-15 | 1993-09-08 | Sony Corp | Address decoder circuits for non-volatile memories |
| JP2652694B2 (ja) * | 1988-12-28 | 1997-09-10 | 三菱電機株式会社 | 昇圧回路 |
-
1991
- 1991-03-18 JP JP3051874A patent/JPH04287418A/ja not_active Withdrawn
-
1992
- 1992-03-18 KR KR1019920004472A patent/KR960003595B1/ko not_active Expired - Fee Related
- 1992-03-18 US US07/853,296 patent/US5187397A/en not_active Expired - Fee Related
- 1992-03-18 EP EP92302319A patent/EP0505158A2/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| US5187397A (en) | 1993-02-16 |
| KR920018758A (ko) | 1992-10-22 |
| EP0505158A2 (en) | 1992-09-23 |
| EP0505158A3 (enExample) | 1994-01-26 |
| JPH04287418A (ja) | 1992-10-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-3-3-R10-R17-oth-X000 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
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| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
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| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
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| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
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| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
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| T11-X000 | Administrative time limit extension requested |
St.27 status event code: U-3-3-T10-T11-oth-X000 |
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| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
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| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
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| G160 | Decision to publish patent application | ||
| PG1605 | Publication of application before grant of patent |
St.27 status event code: A-2-2-Q10-Q13-nap-PG1605 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
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| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U11-oth-PR1002 Fee payment year number: 1 |
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| PN2301 | Change of applicant |
St.27 status event code: A-5-5-R10-R13-asn-PN2301 St.27 status event code: A-5-5-R10-R11-asn-PN2301 |
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| PN2301 | Change of applicant |
St.27 status event code: A-5-5-R10-R13-asn-PN2301 St.27 status event code: A-5-5-R10-R11-asn-PN2301 |
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| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
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| LAPS | Lapse due to unpaid annual fee | ||
| PC1903 | Unpaid annual fee |
St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 19990321 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
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| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |
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| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 19990321 |
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| PN2301 | Change of applicant |
St.27 status event code: A-5-5-R10-R13-asn-PN2301 St.27 status event code: A-5-5-R10-R11-asn-PN2301 |
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| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |