KR960003425A

KR960003425A - Transmission Image Distortion Compensation Circuit of Cable TV Converter

Info

Publication number: KR960003425A
Application number: KR1019940014402A
Authority: KR
Inventors: 신동인
Original assignee: 이형도; 삼성전기 주식회사
Priority date: 1994-06-23
Filing date: 1994-06-23
Publication date: 1996-01-26

Abstract

이 발명은 케이블 텔레비젼의 전송 화상 왜곡 보상회로에 관한 것으로서, 원래의 스크램블 펄스의 하강 에지를 소정 시간 지연시키는 지연소자와, 원래의 스크래블 펄스와 지연소자에 의하여 하강 에지가 지연된 펄스를 출력하는 다수개의 논리조합 게이트를 구성함으로써, 동기신호와 버스트 신호구간 사이에 실리는 스크램블 신호를 소정시간동안 화상신호 구간을 포함하도록 변형함으로써 왜곡부분을 화상신호로 인식가능하도록 하여 원래의 화상 신호상 왜곡을 없앨 수 있는 효과가 있다. 이것은 스크램블 펄스를 이용한 화상 신호의 변형을 위하여 이용가능하다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission image distortion compensation circuit of a cable television. By constructing the logic combination gate, the scramble signal carried between the synchronization signal and the burst signal section is modified to include the image signal section for a predetermined time so that the distortion portion can be recognized as the image signal, thereby eliminating distortion in the original image signal. It works. This is available for the deformation of the image signal using the scrambled pulses.

Description

Transmission Image Distortion Compensation Circuit of Cable TV Converter

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도의 (가)는 정상적인 화상신호의 파형도, (나)는 스크램블 코드의 파형도, (다)는 인버팅된 영상신호의 파형도.1A is a waveform diagram of a normal image signal, (B) is a waveform diagram of a scramble code, and (C) is a waveform diagram of an inverted video signal.

제2도는 이 발명에 따른 케이블 텔레비젼 전송 화상 왜곡 보상회로의 실시예를 나타내는 회로도.2 is a circuit diagram showing an embodiment of a cable television transmission image distortion compensation circuit according to the present invention.

제3도의 (가) 내지 (마)는 제2도의 동작에 따른 각부 파형도, (바)는 제3도(A) to (e) of FIG. 3 are waveform diagrams of each part according to the operation of FIG.

(마)의 스크램블 펄스에 의하여 인버팅되는 영상신호의 파형도이다.The waveform diagram of the video signal inverted by the scramble pulse shown in (e).

Claims

An image distortion compensating circuit of a cable television converter for signal processing after converting an original image transmitted through a wire by a scramble code, comprising: delay means for delaying a signal state for a predetermined time from a falling edge of the scramble pulse; And a logical combining means for logically combining the scramble code and the output signal of the delay means and outputting a scramble pulse delayed by a predetermined time falling edge compared to the scramble code.

The method of claim 1, wherein the logical combining means; A first inverter for inverting the scramble pulse; A second inverter which inverts the signal output from the first inverter and applies the delay signal to the delay means; An AND gate which ANDs the output signal of the first inverter and the delay means; And an exclusive oragate configured to combine the AND gate and the scramble pulse with an exclusive oar to output a pulse whose falling edge is delayed by a predetermined time compared to the scramble pulse.

※ Note: The disclosure is based on the initial application.