JPH06164900A - Picture data reduction converter - Google Patents

Abstract

PURPOSE:To attain the high speed of a conversion processing by operating a picture data reduction conversion by using the picture data by the portion of two lines by using a circuit having a function which delays the data by the portion of one line, regardless of a software processing. CONSTITUTION:The prescribed picture data are obtained from FAX data received through a data line by an FAX decoding part 1, and transmitted to an FIFO 2. The FIFO 2 is equipped with the function which delays the inputted picture data by the portion of one line, and the picture data delayed by the portion of one line are supplied to a logical constitution converting part 3. And also, the picture data from the FAX decoding part 1 are directly supplied to the logical constitution converting part 3 instead of passing through the FIFO 2. Therefore, the two picture data equivalent to two lines which deviate by one line are supplied to the logical constitution converting part 3. The logical constitution converting part 3 executes a processing equivalent to a conversion table by a hardware processing, and obtains dot density reduction-converted picture data.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data reduction / conversion apparatus, and more particularly to an image data reduction / conversion apparatus having a reduced data reduction conversion processing time. 2. Description of the Related Art A communication system for transmitting and receiving different types of image data via a data line has been noticed and put into practical use.
For example, a fax obtained with a fax machine
In order to display image data on a display of an electronic device having a different dot density from the FAX device, the FAX image data must be subjected to dot density reduction conversion processing. Conventionally, such dot density reduction conversion processing is
It is done by software processing. FA in FIG.
An example of X image data is shown. FIG. 3 shows the first line data (First Line Data) and the second line data (Sec) formed by the first bit, the second bit, ..., And the last dot.
ond Line Data) is shown. 4 data D1, D2, D3, and D4 consisting of 4 dots surrounded by the dotted line in FIG. 3 are used as input data, and this input data is used as 1-dot output data according to the conversion table shown in FIG. Data conversion is performed by software processing. The conversion in this example is based on a conversion table that outputs the output data as "1" when the input data "1" are adjacent to each other. The conversion table is not limited to that shown in FIG. 4, but can be set in advance as desired. As described above, the conventional image data reduction / conversion device sets the dot density of the input data to a predetermined dot density by performing software processing according to a conversion table prepared in advance. Converting. However, since such image data reduction conversion processing is dot density reduction conversion processing by software, there is a problem that the conversion processing takes time and it takes time to display an image based on the conversion data. Therefore, an object of the present invention is to provide an image data reduction / conversion device capable of performing high-speed conversion processing and shortening the time until image display. In order to solve the above-mentioned problems, the image data reducing and converting apparatus according to the present invention reduces and converts a plurality of continuous line image data, each of which is composed of a plurality of dot data. In the image data reduction / conversion device, first line means for outputting the line image data with a time delay of one line from the next line image data, and output image data obtained from the first means are input, Second means for performing a predetermined image data reduction conversion process based on the image data. According to the present invention, the data obtained by delaying the next line image data by a time corresponding to one line is obtained by using, for example, a delay means, and the image conversion process such as the dot density reduction conversion process is performed based on the data. Is performed by hardware. Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of an image data reduction conversion device according to the present invention. This embodiment shows an example of performing the conventional dot density reduction conversion based on FIGS. 3 and 4 described above, and the FA received via the data line.
Image data as shown in FIG. 3 is obtained from the X data by the FAX decoding unit. The image data output from the FAX decoding unit 1 is FIFO (First-In First First) as input data.
-Out) is sent to 2. The FIFO 2 has a function of delaying the input image data by one line, and any other circuit such as a delay element can be used as long as it has a similar function. The image data delayed by one line by the FIFO 2 is supplied to the logical configuration conversion unit 3. The image data from the FAX decoding unit 1 is directly supplied to the logical conversion unit 3 without passing through the FIFO 2. Therefore, the logical configuration converter 3 is supplied with two pieces of image data corresponding to two lines, each of which is shifted by one line as shown in FIG. The logical configuration conversion unit 3 has a configuration as shown in FIG. 4, and executes processing corresponding to the conversion table shown in FIG. 4 by hardware processing to obtain image data that has undergone dot density reduction conversion. That is, at an arbitrary timing (when outputting the image data of the second line if the dot density reduction conversion is performed using the image data of the first line and the second line as shown in FIG. 3), the first line from the FIFO2 is output. Image data is read, and the image data is converted with the data of the second line from the FAX decoding unit 1. At this time, the data of the second line is also written in the FIFO2 and stored for conversion of the data with the next line. The logic configuration conversion unit 3 is composed of a decoder 31 and a NAND gate 32, as shown in FIG. 2, for example. The output data is displayed in gradation to reduce image quality deterioration. Therefore, R and G data are output. The above-mentioned 4-dot data D1 to D4 is input to the decoder 31, and among the 16 output terminals (# 0 to # 15), there is at least one "1" of the input data as shown in FIG. In this case, the data from the output terminal # 0 to which the data “1” is output is set as the output data R, and the output terminals # 3 and # to which the data “0” is output when the input data “1” are adjacent to each other.
The outputs from 6, # 7, # 11, # 12, # 13, # 14, and # 15 are supplied to the NAND gate 32. Therefore, the NAN whose input is the output data from the decoder 31
The output from the D gate 32 becomes the output data G as shown in FIG. 4, and the desired conversion can be realized. Although the above embodiments have been described with respect to FAX data, it is obvious that the present invention is not limited to FAX data and can be applied to any image data reduction conversion. As described above, the image data reduction / conversion device according to the present invention does not rely on software processing.
Since the image data reduction conversion is performed by hardware using the image data for at least two lines by using the circuit having the function of delaying by the line, the conversion processing can be speeded up.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a configuration block diagram showing an embodiment of an image data reduction conversion device according to the present invention. FIG. 2 is a block diagram showing a configuration example of a logical configuration conversion unit 3 in the embodiment of FIG. FIG. 3 is a diagram showing an example of image data of a first line and a second line. FIG. 4 is a diagram showing an example of a conversion table used for conventional image data reduction conversion. [Description of Codes] 1 FAX decoding unit 2 FIFO 3 Logical configuration conversion unit 31 Decoder 32 NAND gate

Claims (1)

Claim: What is claimed is: 1. An image data reduction conversion device for reducing and converting a plurality of continuous line image data, each of which is made up of a plurality of dot data, wherein the line image data is time-delayed by one line from the next line image data. First output means for outputting the output image data, and output image data obtained from the first means as input,
An image data reduction conversion apparatus comprising: a second means for performing a predetermined image data reduction conversion processing based on the image data.