KR950034744A - Semiconductor Memory Manufacturing Method - Google Patents

Semiconductor Memory Manufacturing Method Download PDF

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Publication number
KR950034744A
KR950034744A KR1019940011007A KR19940011007A KR950034744A KR 950034744 A KR950034744 A KR 950034744A KR 1019940011007 A KR1019940011007 A KR 1019940011007A KR 19940011007 A KR19940011007 A KR 19940011007A KR 950034744 A KR950034744 A KR 950034744A
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South Korea
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storage electrode
metal layer
forming
mask
semiconductor memory
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KR1019940011007A
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Korean (ko)
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KR100324812B1 (en
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정진기
설여송
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김주용
현대전자산업 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/84—Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 기억장치 제조방법에 관한 것으로, 종래 기술에서 HSG 실리콘을 저장전극에 형성할 때 발생되는 문제점을 해결하기 위하여, 저장전극용 다결정실리콘막 상부에 실리콘이 함유된 금속층 증착시 상기 금속층의 실리콘성분이 저장전극용 다결정실리콘막으로 확산하여 상기 저장전극용 다결정실리콘막과 접하는 상기 금속층의 저부에 실리콘 덩어리를 형성하고 식각공정으로 상기 실리콘 덩어리만 남기고 상기 금속층을 제거함으로써 상기 저장전극용 다결정실리콘막과 실리콘 덩어리를 저장전극으로 사용하여 표면적이 확대되고 전하 축전용량이 증대된 반도체 기억장치를 제조하여 반도체 소자의 고집적화를 가능하게 하고 반도체소자의 신회성을 향상시키는 기술이다.The present invention relates to a method for manufacturing a semiconductor memory device, in order to solve the problem caused when HSG silicon is formed in the storage electrode in the prior art, the deposition of the metal layer containing silicon on the polycrystalline silicon film for the storage electrode The silicon component diffuses into the polycrystalline silicon film for the storage electrode to form a silicon lump at the bottom of the metal layer in contact with the polycrystalline silicon film for the storage electrode, and the etching process removes the metal layer leaving only the silicon lump. It is a technology to enable high integration of semiconductor devices and to improve the reproducibility of semiconductor devices by manufacturing a semiconductor memory device having a large surface area and an increased charge storage capacity by using a film and a silicon agglomerate as storage electrodes.

Description

반도체 기억장치 제조방법Semiconductor Memory Manufacturing Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1E도는 본 발명의 제1실시예로서 반도체 기억장치 제조공정을 도시한 단면도.1A to 1E are sectional views showing the semiconductor memory device manufacturing process as the first embodiment of the present invention.

Claims (4)

반도체 기억장치 제조방법에 있어서, 반도체기판 상부에 하부절연층을 형성하고 상기 하부절연층 상부에 콘택마스크를 이용하여 콘택홀을 형성하는 공정과, 저장전극용 다결정실리콘막을 증착하여 상기 콘택홀을 통하여 상기 반도체기판에 저장전극용 다결정실리콘막이 접속되도록 하는 공정과, 상기 저장전극용 다결정실리콘막 상부에 실리콘이 함유된 금속층을 증착하고 상기 금속층 상부에 상기 금속층 상부에 저장전극 마스크를 형성하는 공정과, 상기 저장전극 마스크를 이용하여 상기 금속층과 저장전극용 다결정실리콘막을 순차적으로 식각하여 금속층패턴과 저장전극용 다결정실리콘막 패턴을 형성하고 상기 저장전극 마스크를 제거하는 공정과, 상기 금속층을 습시강법으로 제거하여 사익 금속층 증착공정시 상기 저장전극용 다결정실리콘막 상부에 반구형 실리콘 덩어리가 남아 표면적이 확대된 저장전극을 형성하는 공정을 포함하는 반도체 기억장치 제조방법.A method of manufacturing a semiconductor memory device, comprising: forming a lower insulating layer on a semiconductor substrate and forming a contact hole on the lower insulating layer by using a contact mask; and depositing a polysilicon film for a storage electrode through the contact hole. A process of connecting a polysilicon film for a storage electrode to the semiconductor substrate, depositing a metal layer containing silicon on the polycrystalline silicon film for the storage electrode, and forming a storage electrode mask over the metal layer on the metal layer; Sequentially etching the metal layer and the polysilicon film for the storage electrode using the storage electrode mask to form a metal layer pattern and the polysilicon film pattern for the storage electrode, and removing the storage electrode mask; Polysilicon for the storage electrode during the deposition process Method for producing a silicon film having a semi-spherical lumps on the top left a semiconductor memory comprising the step of forming the storage electrodes the surface area of the expanded device. 제1항에 있어서, 상기 금속층은 습식방법에 대신에 다결정실리콘에 대하여 선택비가 높은 가스를 사용하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of manufacturing a semiconductor memory device according to claim 1, wherein said metal layer uses a gas having a high selectivity for polycrystalline silicon instead of a wet method. 제1항에 있어서, 상기 금속층은 증착공정은 100℃-200℃ 이하에서 실시하는 것을 특징으로 하는 반도체 기억장치 제조방법.The method of claim 1, wherein the deposition of the metal layer is performed at 100 ° C. to 200 ° C. or less. 반도체 기억장치 제조방법에 있어서, 반도체기판 상부에 하부절연층을 형성하고 상기 하부절연층 상부에 콘택마스크를 형성하는 공정과, 상기 콘택마스크를 이용하여 상기 반도체기판을 노출시키는 콘택홀을 형성하고 사익 콘택홀을 통하여 상기 반도체기판에 접속되도록 저장전극용 다결정실리콘막으로 상기 콘택홀을 매립하한 다음, 그 상부에 저장전극 마스크를 형성하는 공정과, 상기 저장전극 마스크를 사용하여 상기 저장전극용 다결정실리콘막을 식각하여 저장전극용 다결정실리콘막패턴을 형성하고 상기 저장전극 마스크를 제거하는 공정과, 전체구조상부에 금속층을 일정두께 증착하는 공정과, 상기 금속층 증착시 저장전극용 다결정실리콘막패턴의 측벽과 상부에 접하는 상기 금속층에 형성된 실리콘 덩어리를 남기고 상기 금속층을 습식방법으로 제거하는 공정을 포함하는 반도체 기억장치 제조방법.A method of manufacturing a semiconductor memory device, comprising: forming a lower insulating layer over a semiconductor substrate and forming a contact mask over the lower insulating layer; forming a contact hole for exposing the semiconductor substrate using the contact mask; Filling the contact hole with a polysilicon film for a storage electrode so as to be connected to the semiconductor substrate through a contact hole, and forming a storage electrode mask thereon; and using the storage electrode mask, the polysilicon for the storage electrode Etching the film to form a polysilicon film pattern for the storage electrode and removing the storage electrode mask; depositing a metal layer on the entire structure to a predetermined thickness; and sidewalls of the polysilicon film pattern for the storage electrode when the metal layer is deposited; Wet the metal layer leaving a lump of silicon formed on the metal layer in contact with the top. The semiconductor memory device manufacturing method including a step of removing the method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940011007A 1994-05-20 1994-05-20 Method for fabricating semiconductor memory device KR100324812B1 (en)

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KR1019940011007A KR100324812B1 (en) 1994-05-20 1994-05-20 Method for fabricating semiconductor memory device

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KR950034744A true KR950034744A (en) 1995-12-28
KR100324812B1 KR100324812B1 (en) 2002-09-04

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03252162A (en) * 1990-02-28 1991-11-11 Mitsubishi Electric Corp Semiconductor device
JPH04242970A (en) * 1991-01-01 1992-08-31 Tadahiro Omi Dynamic semiconductor memory
JP3224563B2 (en) * 1991-07-30 2001-10-29 新日本製鐵株式会社 A method for enlarging the active surface area of alloy materials in which intermetallic compounds are uniformly dispersed

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