KR950025923U - 반도체 칩 - Google Patents

반도체 칩

Info

Publication number
KR950025923U
KR950025923U KR2019940003555U KR19940003555U KR950025923U KR 950025923 U KR950025923 U KR 950025923U KR 2019940003555 U KR2019940003555 U KR 2019940003555U KR 19940003555 U KR19940003555 U KR 19940003555U KR 950025923 U KR950025923 U KR 950025923U
Authority
KR
South Korea
Prior art keywords
semiconductor chip
chip
semiconductor
Prior art date
Application number
KR2019940003555U
Other languages
English (en)
Other versions
KR970004619Y1 (ko
Inventor
정관호
Original Assignee
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 현대전자산업 주식회사 filed Critical 현대전자산업 주식회사
Priority to KR2019940003555U priority Critical patent/KR970004619Y1/ko
Publication of KR950025923U publication Critical patent/KR950025923U/ko
Application granted granted Critical
Publication of KR970004619Y1 publication Critical patent/KR970004619Y1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
KR2019940003555U 1994-02-25 1994-02-25 반도체 칩 KR970004619Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019940003555U KR970004619Y1 (ko) 1994-02-25 1994-02-25 반도체 칩

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019940003555U KR970004619Y1 (ko) 1994-02-25 1994-02-25 반도체 칩

Publications (2)

Publication Number Publication Date
KR950025923U true KR950025923U (ko) 1995-09-18
KR970004619Y1 KR970004619Y1 (ko) 1997-05-13

Family

ID=19377856

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019940003555U KR970004619Y1 (ko) 1994-02-25 1994-02-25 반도체 칩

Country Status (1)

Country Link
KR (1) KR970004619Y1 (ko)

Also Published As

Publication number Publication date
KR970004619Y1 (ko) 1997-05-13

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Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20080728

Year of fee payment: 12

EXPY Expiration of term