KR950025866A - Contact hole formation method of semiconductor device - Google Patents

Contact hole formation method of semiconductor device Download PDF

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Publication number
KR950025866A
KR950025866A KR1019940001959A KR19940001959A KR950025866A KR 950025866 A KR950025866 A KR 950025866A KR 1019940001959 A KR1019940001959 A KR 1019940001959A KR 19940001959 A KR19940001959 A KR 19940001959A KR 950025866 A KR950025866 A KR 950025866A
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KR
South Korea
Prior art keywords
contact hole
forming
etching
thermal oxide
silicon substrate
Prior art date
Application number
KR1019940001959A
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Korean (ko)
Inventor
박상훈
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940001959A priority Critical patent/KR950025866A/en
Publication of KR950025866A publication Critical patent/KR950025866A/en

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Abstract

고집적 반도체 소자의 콘택홀을 형성할 때 콘택홀 저부의 실리콘 기판이 손상되는 것을 방지하는 기술로서 실리콘기판상에 절연막을 형성하는 단계와, 상기 절연막의 일정부분을 식각하여 콘택홀을 형성하되, 콘택홀 저부에 얇은 두께의 절연막이 남도록 과소식각하는 단계와, 열산화막을 전체 구조상부에 형성하는 단계와, 상기 열산화막을 식각하여 콘택홀 측벽에 열산화막 스페이서를 형성하는 단계와, 습식식각으로 상기 스페이서와 절연막의 일정두께를 식각하여 실리콘기판이 노출된 콘택홀을 형성하는 단계로 이루어진다Forming an insulating film on the silicon substrate to prevent damage to the silicon substrate of the bottom of the contact hole when forming the contact hole of the highly integrated semiconductor device, and forming a contact hole by etching a portion of the insulating film, the contact Overetching a thin insulating film at the bottom of the hole, forming a thermal oxide film on the entire structure, etching the thermal oxide film to form a thermal oxide spacer on the sidewall of the contact hole, and wet etching the same. Etching a predetermined thickness of the spacer and the insulating layer to form a contact hole exposing the silicon substrate.

Description

반도체 소자의 콘택홀 형성방법Contact hole formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도 내지 제4도는 본 발명에 의해 반도체소자의 콘택홀을 형성하는 단계를 도시한 단면도.1 to 4 are cross-sectional views showing a step of forming a contact hole of a semiconductor device according to the present invention.

Claims (5)

반도체소자의 콘택홀 형성방법에 있어서, 실리콘기판상에 절연막을 형성하는 단계와, 상기 절연막의 일정부분을 식각하여 콘택홀을 형성하되, 콘택홀 저부에 얇은 두께의 절연막이 남도록 과소식각하는 단계와, 열산화막을 전체 구조 상부에 형성하는 단계와, 상기 열산화막을 식각하여 콘택홀 측벽에 열산화막 스페이서를 형성하는 단계와, 습식식각으로 상기 스페이서와 절연막의 일정두께를 식각하여 실리콘기판이 노출된 콘택홀을 형성하는 단계로 이루어지는 반도체소자의 콘택홀 형성방법.A method for forming a contact hole in a semiconductor device, the method comprising: forming an insulating film on a silicon substrate, etching a predetermined portion of the insulating film to form a contact hole, and underetching the insulating film to a thin thickness at the bottom of the contact hole; Forming a thermal oxide film on the entire structure; forming a thermal oxide spacer on the sidewalls of the contact holes by etching the thermal oxide film; and etching a predetermined thickness of the spacer and the insulating layer by wet etching to expose the silicon substrate. A contact hole forming method of a semiconductor device comprising the step of forming a contact hole. 제1항에 있어서, 상기 과소식각시 절연막 두께의 90-99%정도를 식각하는 것을 특징으로 하는 반도체소자의 콘택홀 형성방법.The method of claim 1, wherein about 90-99% of the thickness of the insulating layer is etched during the over-etching. 제1항에 있어서, 상기 열산화막은 100-500Å의 두께로 형성하는 것을 특징으로 하는 반도체소자의 콘택홀 형성방법.The method of claim 1, wherein the thermal oxide film is formed to a thickness of 100-500 kPa. 제1항에 있어서, 상기 열산화막을 300Watt이하의 저전력을 갖는 RIE으로 식각하는 것을 특징으로 하는 반도체소자의 콘택홀 형성방법.The method of claim 1, wherein the thermal oxide layer is etched by RIE having a low power of 300 Watt or less. 제1항에 있어서, 상기 스페이서와 절연막의 일정두께를 습식식각하여 실리콘기판이 노출된 콘택홀을 형성할 때 콘택홀의 임계치수가 0.01-0.05㎛정도 커지는 것을 특징으로 하는 반도체소자의 콘택홀 형성방법.The method of claim 1, wherein a critical dimension of the contact hole is increased by about 0.01 μm to about 0.05 μm when the contact hole exposed to the silicon substrate is formed by wet etching a predetermined thickness of the spacer and the insulating layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940001959A 1994-02-03 1994-02-03 Contact hole formation method of semiconductor device KR950025866A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940001959A KR950025866A (en) 1994-02-03 1994-02-03 Contact hole formation method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940001959A KR950025866A (en) 1994-02-03 1994-02-03 Contact hole formation method of semiconductor device

Publications (1)

Publication Number Publication Date
KR950025866A true KR950025866A (en) 1995-09-18

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KR1019940001959A KR950025866A (en) 1994-02-03 1994-02-03 Contact hole formation method of semiconductor device

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KR (1) KR950025866A (en)

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