KR950023079A

KR950023079A - Exchange board test circuit mounted on computer

Info

Publication number: KR950023079A
Application number: KR1019930028441A
Authority: KR
Inventors: 김기철
Original assignee: 김광호; 삼성전자 주식회사
Priority date: 1993-12-18
Filing date: 1993-12-18
Publication date: 1995-07-28

Abstract

보드 테스트를 총괄적으로 제어하고 그 결과를 분석하는 상기 개인용 컴퓨터의 어드레스버스로부터 특정 어드레스를 디코딩하여 소정의 제어신호들을 발생하기 위한 디코딩부와, 테스트받는 보드의 데이타송수신능력을 검사할 수 있도록 각 채널에 송신할 데이타 혹은 수신된 데이타를 할당해주기 위한 타임스위치부와, 테스트할 보드에 테스트에 필요한 클럭을 공급하기 위한 클럭제어부와, 테스트될 보드와 접속하기 위한 연결수단으로 구성되어 개인용 컴퓨터에 실장됨을 특징으로 하는 교환기용-보드 테스트회로를 제공한다.Decoding unit for generating specific control signals by decoding a specific address from the address bus of the personal computer that controls the board test and analyzes the result, and each channel to check the data transmission / reception capability of the board under test It is equipped with a time switch unit for allocating data to be sent or received to the computer, a clock control unit for supplying a clock required for the test to the board to be tested, and a connection means for connecting to the board to be tested. An exchange board test circuit is provided.

Description

Exchange board test circuit mounted on computer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 교환기용-보드 테스트회로의 구성도,1 is a configuration diagram of a switch-board test circuit according to the present invention;

제2도는 본 발명을 이용한 테스트 시스템 구성도.2 is a configuration of a test system using the present invention.

Claims

An apparatus for testing an exchange board using a personal computer, comprising: decoding means for generating predetermined control signals by decoding a specific address from an address bus of the personal computer which collectively controls the board test and analyzes the result A time switch means for allocating data to be transmitted or received to each channel so as to check the data transmission / reception capability of the board under test, a clock control means for supplying a clock required for the test to the board to be tested; An exchange board test circuit, comprising: a connecting means for connecting to a board to be tested and mounted on the personal computer.

The circuit of claim 1, further comprising a transmission unit for controlling data transmission and reception between the data bus of the personal computer and the board to be tested.

The circuit according to claim 1 or 2, further comprising a buffer unit for buffering data transmitted and received between the time switch means and the board to be tested.

4. A circuit according to any one of claims 1 to 3, wherein said clock control means comprises a phase-locked loop logic for synchronizing with a clock signal supplied from an external source.

※ Note: The disclosure is based on the initial application.