KR940005151A - Method and apparatus for displaying video signals on screens with different aspect ratios - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for displaying video signals on screens having different aspect ratios, and more particularly, to displaying a screen having a predetermined aspect ratio on a screen having a predetermined wide aspect ratio. The digital image data is stored in the memory according to the write clock by the write reset signal and the write enable signal controlling the memory, and the stored data is read in accordance with the read clock by the read reset signal and write enable signal controlling the memory. It is taken out and displayed. At this time, the read enable signal and the write enable signal are operated in reverse, so that the operation of storing in the memory and the operation of reading occur alternately. According to a mode based on predetermined bit information, the read clock is made faster than the write clock to time-compress. In addition, there is a method that can be displayed as it is through the same read clock and write clock without time compression. In this way, the display not only makes it possible to use the water receivers having different aspect ratios, but also improves the resolution and the realism.

Description

Method and apparatus for displaying video signal on screen with different aspect ratio

Since this is an open matter, no full text was included.

1 is a block diagram showing an embodiment of an apparatus for displaying a video signal on a screen having a different aspect ratio according to the present invention.

2 is a schematic diagram showing the screen area displayed by the apparatus of FIG.

3 is a detailed block diagram and truth table of a clock generator in the apparatus of FIG.

4 is a detailed block diagram and waveform diagram of the reset control unit in the apparatus of FIG.

5 is a detailed block diagram and waveform diagram of a write control unit in the apparatus of FIG.

6 is a flowchart for explaining an operation of a read control unit in the apparatus of FIG.

Claims (13)

A method for displaying a video signal having a predetermined aspect ratio on a screen having a wide aspect ratio, comprising: a multiplexer for selectively applying at least two memories and outputs of the memory to a screen, wherein the video signal is displayed on the screen. Generating a write clock pulse and a read clock pulse having a predetermined frequency in response to a control signal for determining a mode to be displayed, the memory in response to a horizontal synchronization signal of the video signal and the write clock pulse or a read clock pulse; Resetting, alternately applying a write enable signal to each of the plurality of memories at every clock pulse in response to the horizontal synchronization signal of the image signal and the write clock pulse; and according to the write enable signal. Writing the image signal to the memory, the write enable signal and the Alternately applying a read enable signal to each of the plurality of memories in response to a preclock pulse, and outputting an image signal recorded in the memory according to the read enable signal, the mode And controlling the multiplexer according to a determination control signal. The method of claim 1, wherein the mode determination control signal comprises two bits of information. The method of claim 1, wherein the frequency of the read clock is higher than the frequency of the write clock pulse. The method of claim 1, wherein the frequency of the read clock pulse is the same as the frequency of the write clock pulse. The method of claim 1, wherein one of two input terminals is selected according to a signal for controlling the multiplexer, and a signal applied to the selected input terminal is output. An apparatus for displaying a video signal having a predetermined aspect ratio on a screen having a wide aspect ratio, the apparatus comprising: at least two memories for writing and reading the video signal; A clock generator for applying a write clock pulse and a read clock pulse having a predetermined frequency to the respective memories in response to a control signal for determining a mode in which the video signal is displayed on the screen; and a horizontal synchronization signal of the video signal. A reset control unit for resetting the memory in response to the write clock and the read clock pulse of the clock repeating unit, and the plurality of memories at every clockperth in response to a horizontal synchronization signal of the image signal and the write clock pulse of the clock generator; A write control unit for alternately applying a write enable signal to each of the plurality of memory units; a read enable signal is alternately applied to each of the plurality of memories every clock pulse in response to an output signal of the write control unit and a read clock pulse of the clock generator; A read control unit for applying to the multiplexer a selection signal for controlling the multiplexer; And a multiplexer for alternately applying outputs of the plurality of memories to the screen according to a selection signal of the read control unit. 7. The apparatus according to claim 6, wherein the frequency of the read clock pulse of the clock generator is higher than that of the write clock pulse. 7. The apparatus of claim 6, wherein the frequency of the read clock pulse of the clock repeating unit is the same as that of the write clock pulse. 9. The clock signal according to any one of claims 6 to 8, wherein the clock repeating unit receives a logical multiplication device for logically multiplying two bits of information and outputs a plurality of clock signals having different frequencies. Means for outputting a read clock pulse and selecting one of the plurality of clock signals according to the output signal of the logical multiplication device and outputting the written clock pulse to a write clock pulse. Device for displaying. 10. The apparatus of claim 9, wherein the frequency of the write clock pulse is the same as that of the read clock pulse only when the output of the logical multiplication device is " 11 ". 9. The reset controller of claim 6, wherein the reset controller is configured by a clock applied with a horizontal synchronization signal through an input terminal receiving a horizontal synchronization signal and a clock input terminal receiving a clock pulse from the clock generator. A 1D flip-flop that appears on the output terminal as it is; A second D flip-flop that appears on the output terminal as is by the clock applied with the output of the first D flip-flop through an input terminal receiving the output of the first D flip-flop and a clock input terminal receiving the same clock pulse; The horizontal synchronizing signal applying unit includes means for performing a negative logic multiplication through the input terminal and the input terminal receiving the signal of the negative output terminal of the second D flip-flop to output the video signal to a screen having a different aspect ratio. Device for displaying. The clock controller of any one of claims 6 to 8, wherein the write control unit is driven by a clock applied with a horizontal synchronization signal through an input terminal receiving a horizontal synchronization signal and a clock input terminal receiving a clock pulse from the clock generator. 2D- which indicates a first write enable signal through an input terminal receiving a signal appearing on the 1D-flip-flop and the negative output terminal appearing on the output terminal and a clock input terminal receiving the output of the first-D flip-flop. And a flip-flop, and an inverter element receiving the first write enable signal and illegally outputting the second write enable signal. The apparatus of claim 6, wherein the read control unit outputs a control signal for setting an area to be displayed according to a mode determined by 2 bits of information, and applies the control signal to the multiplexer. A D-flip-flop for outputting a signal having a waveform opposite to that of the write enable signal through an input terminal receiving a write enable signal and a clock input terminal receiving the read clock pulse; And a means for receiving an output signal of the D-flip flop and a control signal for setting the area, and selecting one of the D-flip-flop to output a read enable signal. Device for. ※ Note: The disclosure is based on the initial application.