KR940003048A - 디램의 캐패시터 제조방법 - Google Patents

디램의 캐패시터 제조방법 Download PDF

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Publication number
KR940003048A
KR940003048A KR1019920012966A KR920012966A KR940003048A KR 940003048 A KR940003048 A KR 940003048A KR 1019920012966 A KR1019920012966 A KR 1019920012966A KR 920012966 A KR920012966 A KR 920012966A KR 940003048 A KR940003048 A KR 940003048A
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KR
South Korea
Prior art keywords
capacitor
forming
oxide film
polysilicon
followed
Prior art date
Application number
KR1019920012966A
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English (en)
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KR100250092B1 (ko
Inventor
곽종석
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019920012966A priority Critical patent/KR100250092B1/ko
Publication of KR940003048A publication Critical patent/KR940003048A/ko
Application granted granted Critical
Publication of KR100250092B1 publication Critical patent/KR100250092B1/ko

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/038Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0387Making the trench
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H01L21/823425MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 DRAM에서 캐패시터의 구조를 개선하여, 용량을 크게함과 동시에 커패시터를 매몰시켜 상층부의 평탄화에 적합하도록 하는데 목적이 있다.
이 목적을 달성하기 위해, 액티브 트랜지스터 아래층에 캐패시터를 형성하여 매몰형태로 하였고, 2개의 셀에 대한 한개의 깊은 우물(Well)을 식각해서 커패시터의 면적을 크게 하였다.

Description

디램의 캐패시터 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 (A)∼(D)는 본 발명에 따른 DRAM 캐패시터의 제조공정도.

Claims (1)

  1. 절연산화막(7)을 설정한후, 액티브 영역을 소정깊이 식각한 다음 폴리실리콘을 성장시키고, 그후 이온주입과 열처리를 행하여 커패시터의 플레이트(1)를 형성하는 단계와, 진패시터의 플레이트(1)사이에 커패시터 절연막(2)을 형성한후에 커패시터 노드(3)를 만들기 위해 폴리실리콘을 증착한 다음 이온주입과 열처리를 행하는 단계와, 커패시터노드(3)내에 소정 높이까지 산화막(4)을 형성한후. 상기 산화막(4)상에 폴리실리콘층(5)을 형성한 다음 액티브 트랜지스터, 소스 및 드레인을 형성하는 단계를 특징으로 하는 DRAM의 커패시터 제조방법.
    ※ 참고사항:최초출원 내용에 의하여 공개하는 것임.
KR1019920012966A 1992-07-21 1992-07-21 디램의 캐패시터 제조방법 KR100250092B1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920012966A KR100250092B1 (ko) 1992-07-21 1992-07-21 디램의 캐패시터 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920012966A KR100250092B1 (ko) 1992-07-21 1992-07-21 디램의 캐패시터 제조방법

Publications (2)

Publication Number Publication Date
KR940003048A true KR940003048A (ko) 1994-02-19
KR100250092B1 KR100250092B1 (ko) 2000-03-15

Family

ID=19336687

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920012966A KR100250092B1 (ko) 1992-07-21 1992-07-21 디램의 캐패시터 제조방법

Country Status (1)

Country Link
KR (1) KR100250092B1 (ko)

Also Published As

Publication number Publication date
KR100250092B1 (ko) 2000-03-15

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