TW266324B - Process for dynamic random access memory with coaxial capacitor - Google Patents

Process for dynamic random access memory with coaxial capacitor

Info

Publication number
TW266324B
TW266324B TW84106106A TW84106106A TW266324B TW 266324 B TW266324 B TW 266324B TW 84106106 A TW84106106 A TW 84106106A TW 84106106 A TW84106106 A TW 84106106A TW 266324 B TW266324 B TW 266324B
Authority
TW
Taiwan
Prior art keywords
insulator
depositing
polysilicon
forming
capacitor
Prior art date
Application number
TW84106106A
Other languages
Chinese (zh)
Inventor
Jong-Ren Chen
Original Assignee
Vanguard Int Semiconduct Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vanguard Int Semiconduct Corp filed Critical Vanguard Int Semiconduct Corp
Priority to TW84106106A priority Critical patent/TW266324B/en
Application granted granted Critical
Publication of TW266324B publication Critical patent/TW266324B/en

Links

Landscapes

  • Semiconductor Memories (AREA)

Abstract

A process of dynamic random access memory with coaxial capacitor comprises the steps of: forming field oxide needed by separating active regions; forming field effect transistor which has gate dielectric, gate electrode, spacer and source/drain region; depositing insulator-1, insulator-2 and insulator-3; depositing one doped polysilicon-1; depositing insulator-4; forming node contact by lithography and etching; depositing one doped polysilicon-2 which will fill up the above node contact; anisotropically performing etchback to the above polysilicon-2 by plasma etching in order to form polysilicon plug in the above node contact; removing the above insulator-4 by chemical solution; depositing insulator-5; anisotropically performing etchback to the above insulator-5 by plasma etching in order to form spacer on the sides of the above polysilicon plug; depositing one doped polysilicon-3; anisotropically performing etchback to the above polysilicon-3 by plasma etching in order to form spacer, and the above etchback stops on surface of the above insulator-3; removing the above spacer formed by insulator-5 by chemical solution, completing storage node of capacitor; forming one very thin capacitor dielectric; forming one doped polysilicon-4, and defining top plate of capacitor by lithography and etching.
TW84106106A 1995-06-14 1995-06-14 Process for dynamic random access memory with coaxial capacitor TW266324B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW84106106A TW266324B (en) 1995-06-14 1995-06-14 Process for dynamic random access memory with coaxial capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW84106106A TW266324B (en) 1995-06-14 1995-06-14 Process for dynamic random access memory with coaxial capacitor

Publications (1)

Publication Number Publication Date
TW266324B true TW266324B (en) 1995-12-21

Family

ID=51402195

Family Applications (1)

Application Number Title Priority Date Filing Date
TW84106106A TW266324B (en) 1995-06-14 1995-06-14 Process for dynamic random access memory with coaxial capacitor

Country Status (1)

Country Link
TW (1) TW266324B (en)

Similar Documents

Publication Publication Date Title
US5482885A (en) Method for forming most capacitor using poly spacer technique
WO2002050896A3 (en) Method for fabricating vertical transistor rench capacitor dram cells
KR0135067B1 (en) Device & cell manufacturing of semiconductor device
US5585284A (en) Method of manufacturing a SOI DRAM
US5236858A (en) Method of manufacturing a semiconductor device with vertically stacked structure
US5701264A (en) Dynamic random access memory cell having increased capacitance
US5066606A (en) Implant method for advanced stacked capacitors
US5858835A (en) Method for fabricating a capactior in a DRAM cell
TW266324B (en) Process for dynamic random access memory with coaxial capacitor
US5447879A (en) Method of manufacturing a compactor in a semiconductor memory device having a TFT transistor
US5851872A (en) Method of fabricating dynamic random access memory
TW265471B (en) Process of fork-type memory capacitor
TW291600B (en) Improved process of stacked dynamic random access memory
TW287315B (en) Fabrication process of dynamic random access memory with high capacitance
TW266323B (en) Process for stack dynamic random access memory
TW269055B (en) Process of stack dynamic random access memory
TW288164B (en) Method of fabricating dynamic random access memory with E-shape capacitor
KR930011544B1 (en) Method of fabricating for stacked cell
KR930006277B1 (en) Method for fabricating stacted capacitor cell
TW272314B (en) Fabricating method for stack DRAM memory cell
TW274153B (en) Fabricating method for SRAM with double-trench capacitor
KR950012552B1 (en) Structure of dram cell and manufacturing method thereof
TW273037B (en) Fabricating method for T shaped capacitor of IC
TW269056B (en) Fabricating method for DRAM
KR950012551B1 (en) Structure of dram cell and manufacturing method thereof