KR940001445A - LDD manufacturing method of semiconductor device - Google Patents

LDD manufacturing method of semiconductor device Download PDF

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Publication number
KR940001445A
KR940001445A KR1019920010036A KR920010036A KR940001445A KR 940001445 A KR940001445 A KR 940001445A KR 1019920010036 A KR1019920010036 A KR 1019920010036A KR 920010036 A KR920010036 A KR 920010036A KR 940001445 A KR940001445 A KR 940001445A
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KR
South Korea
Prior art keywords
ldd
gate
semiconductor device
actual use
size
Prior art date
Application number
KR1019920010036A
Other languages
Korean (ko)
Inventor
정원영
이준성
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019920010036A priority Critical patent/KR940001445A/en
Publication of KR940001445A publication Critical patent/KR940001445A/en

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Abstract

본 발명은 측벽없이 LDD를 실현할 수 있는 반도체 장치의 LDD 제조방법에 관한것으로, 종래에는 최적의 측벽형성이 어려웠고, 측벽 공정시 게이트가 손상되는 결점이 있었으나, 본 발명에서는 측벽 공정없이 게이트를 이용하여 LDD를 실현하므로써 상기 결점을 개선시킬 수 있는 것이다.The present invention relates to a LDD manufacturing method of a semiconductor device capable of realizing an LDD without sidewalls. In the related art, an optimal sidewall formation was difficult and a gate was damaged during sidewall processing. However, in the present invention, a gate is used without a sidewall process. By implementing the LDD, the above defects can be improved.

Description

반도체 장치의 LDD 제조방법LDD manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명 반도체 장치의 LDD제조를 나타낸 공정 단면도.2 is a cross sectional view showing the manufacturing of LDD of the semiconductor device of the present invention.

Claims (3)

기판 (10)위에 산화막 (11)과 게이트 (12)를 실제 사용할것 보다 크게 패 터 닝하고, 소오스/드레 인용의 고농도 이온을 주입하여 소오스/드레인 (13)을 형성하는 단계와, 상기 산화막 (11)과 게이트 (12)의 표면을 일정깊이 제거하여 실제 사용할 크기가 되도록 한 후 LDD용 저농도 이온을 주입하여 LDD (14)를 형성하는 단계를 차례로 실시하여 이루어지는 반도체 장치의 LDD제조방법.Patterning the oxide film 11 and the gate 12 on the substrate 10 to be larger than the actual use, and implanting high concentration ions of source / drain quotient to form the source / drain 13; 11) and a step of removing the surface of the gate (12) to a predetermined size to make the actual use size, and then injecting low concentration ions for LDD to form the LDD (14) in order to produce a LDD of a semiconductor device. 제1항에 있어서, 게이트(12)는 폴릭 실리콘을 사용하는 반도체 장치의 LDD 제조방법.The method of claim 1, wherein the gate (12) uses polysilicon. 제 1항에 있어서, 산화막 (11)과 게 이트 (12)를 실제 사용할것 보다 1.5배의 크기로 패터닝하는 반도체 장치의LDD제조방법.2. The method of claim 1, wherein the oxide film (11) and the gate (12) are patterned to a size 1.5 times larger than actual use. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920010036A 1992-06-10 1992-06-10 LDD manufacturing method of semiconductor device KR940001445A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920010036A KR940001445A (en) 1992-06-10 1992-06-10 LDD manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920010036A KR940001445A (en) 1992-06-10 1992-06-10 LDD manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
KR940001445A true KR940001445A (en) 1994-01-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920010036A KR940001445A (en) 1992-06-10 1992-06-10 LDD manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR940001445A (en)

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