KR930016250U - 반도체 패키지 - Google Patents

반도체 패키지

Info

Publication number
KR930016250U
KR930016250U KR2019910022567U KR910022567U KR930016250U KR 930016250 U KR930016250 U KR 930016250U KR 2019910022567 U KR2019910022567 U KR 2019910022567U KR 910022567 U KR910022567 U KR 910022567U KR 930016250 U KR930016250 U KR 930016250U
Authority
KR
South Korea
Prior art keywords
semiconductor package
package
semiconductor
Prior art date
Application number
KR2019910022567U
Other languages
English (en)
Other versions
KR0119764Y1 (ko
Inventor
고준수
Original Assignee
금성일렉트론주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론주식회사 filed Critical 금성일렉트론주식회사
Priority to KR2019910022567U priority Critical patent/KR0119764Y1/ko
Publication of KR930016250U publication Critical patent/KR930016250U/ko
Application granted granted Critical
Publication of KR0119764Y1 publication Critical patent/KR0119764Y1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR2019910022567U 1991-12-17 1991-12-17 반도체 패키지 KR0119764Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910022567U KR0119764Y1 (ko) 1991-12-17 1991-12-17 반도체 패키지

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910022567U KR0119764Y1 (ko) 1991-12-17 1991-12-17 반도체 패키지

Publications (2)

Publication Number Publication Date
KR930016250U true KR930016250U (ko) 1993-07-28
KR0119764Y1 KR0119764Y1 (ko) 1998-07-01

Family

ID=71598564

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910022567U KR0119764Y1 (ko) 1991-12-17 1991-12-17 반도체 패키지

Country Status (1)

Country Link
KR (1) KR0119764Y1 (ko)

Also Published As

Publication number Publication date
KR0119764Y1 (ko) 1998-07-01

Similar Documents

Publication Publication Date Title
KR930012117U (ko) 반도체 패키지
DE69232912D1 (de) Halbleitergehäuse
DE69226398T2 (de) Halbleiterchip-Verpackung
DE69229546D1 (de) Halbleiteranordnung
DE69231409D1 (de) Oberflächenmontierbare Halbleiterpackung
DE69322140D1 (de) Halbleiterpackung
DE69226742T2 (de) Halbleitervorrichtung
DE69124399D1 (de) Halbleitervorrichtung
KR930003589U (ko) 반도체 패키지용 캐리어
DE69222084D1 (de) Oberflächenmontierbare Halbleiterpackung
DE69223017T2 (de) Verbindungshalbleiterbauelement
DE69210935T2 (de) Halbleiteranordnung
DE69227663D1 (de) Halbleitereinrichtung
DE69432168D1 (de) Halbleitergehäuse
KR930016250U (ko) 반도체 패키지
KR930024367U (ko) 반도체 패키지
KR940013675U (ko) 반도체 패키지
KR920015767U (ko) H형 반도체 패키지
KR930016252U (ko) 반도체 패키지용 리드프레임
KR930016280U (ko) 고집적 패키지
KR930024375U (ko) 반도체 패키지
KR940013678U (ko) 반도체 패키지
KR940013676U (ko) 반도체 패키지
KR940017910U (ko) 반도체 패키지
KR940006479U (ko) 멀티 칩 패키지

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20050221

Year of fee payment: 8

LAPS Lapse due to unpaid annual fee