KR930015109A - Manufacturing method of multilayer capacitor for high integration - Google Patents

Manufacturing method of multilayer capacitor for high integration Download PDF

Info

Publication number
KR930015109A
KR930015109A KR1019910023904A KR910023904A KR930015109A KR 930015109 A KR930015109 A KR 930015109A KR 1019910023904 A KR1019910023904 A KR 1019910023904A KR 910023904 A KR910023904 A KR 910023904A KR 930015109 A KR930015109 A KR 930015109A
Authority
KR
South Korea
Prior art keywords
multilayer capacitor
high integration
manufacturing
followed
deposition
Prior art date
Application number
KR1019910023904A
Other languages
Korean (ko)
Inventor
문찬
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019910023904A priority Critical patent/KR930015109A/en
Publication of KR930015109A publication Critical patent/KR930015109A/en

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 MMIC의 고집적화를 위한 적층형 커패시터는 GaAs 기판상에 RIE 기법으로 트렌치를 형성한후 1차 금속을 스파터링 증착하고 이어서 유전층을 PRCVD 기법으로 증착하고 이어서 2차 금속을 증착하여 제조한다.In the present invention, a multilayer capacitor for high integration of a MMIC is fabricated by forming a trench on a GaAs substrate by RIE, followed by spatter deposition of a primary metal, followed by deposition of a dielectric layer by PRCVD, followed by deposition of a secondary metal.

Description

고 집적화를 위한 적층형 커패시터의 제조방법Manufacturing method of multilayer capacitor for high integration

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제4도의 (A)-(C)는 본 발명의 적층형 커패시터의 제조방법 설명도.(A)-(C) of FIG. 4 is a figure explaining the manufacturing method of the multilayer capacitor of this invention.

Claims (1)

GaAs 기판상에 반응성 이온 식각기법으로 트렌치를 형성하고, 상기 트렌치 면을 따라 1차 금속을 스퍼터링하여 증착하고, 1차 금속층 상에 PECVD 기법으로 유전층을 형성하고, 유전층 상에 2차 금속을 증착하는 것을 특징으로 하는 고집적화를 위한 적층형 커패시터의 제조방법.Forming a trench on a GaAs substrate by reactive ion etching, sputtering and depositing a primary metal along the trench surface, forming a dielectric layer by PECVD on the primary metal layer, and depositing a secondary metal on the dielectric layer Method of manufacturing a multilayer capacitor for high integration, characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910023904A 1991-12-23 1991-12-23 Manufacturing method of multilayer capacitor for high integration KR930015109A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910023904A KR930015109A (en) 1991-12-23 1991-12-23 Manufacturing method of multilayer capacitor for high integration

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910023904A KR930015109A (en) 1991-12-23 1991-12-23 Manufacturing method of multilayer capacitor for high integration

Publications (1)

Publication Number Publication Date
KR930015109A true KR930015109A (en) 1993-07-23

Family

ID=67356813

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910023904A KR930015109A (en) 1991-12-23 1991-12-23 Manufacturing method of multilayer capacitor for high integration

Country Status (1)

Country Link
KR (1) KR930015109A (en)

Similar Documents

Publication Publication Date Title
TW358999B (en) Integrated high-performance decoupling capacitor
TW274640B (en) Method for making a capacitor
CA2143522A1 (en) Method for manufacturing a grain boundary type josephson junction device
KR930015109A (en) Manufacturing method of multilayer capacitor for high integration
TW362269B (en) Manufacturing method for improving the step coverage of titanium barrier capability
EP0366013A3 (en) Selective dielectric deposition on horizontal features of an integrated circuit subassembly
KR930001494A (en) Capacitor Manufacturing Method for Semiconductor Devices
TW355813B (en) Method for manufacturing semiconductor element
KR890004397A (en) Double metal formation method of integrated circuit
KR940022706A (en) Via contact manufacturing method
KR950001899A (en) Contact formation method during PLUG process
KR910005388A (en) Semiconductor manufacturing method using oxide film
KR970018115A (en) Metal wiring formation method of semiconductor device
KR970072313A (en) Method of wiring semiconductor thin film
KR930014964A (en) Capacitor Plate Structure
KR910005436A (en) Semiconductor manufacturing method using pattern layer
KR950021416A (en) Metal wiring formation method
KR920010677A (en) Metallized Film Capacitors and Methods for Manufacturing the Same
KR930014831A (en) Interlayer oxide film formation method of double polycrystalline silicon layer
KR950015592A (en) Tungsten Plug Formation Method
KR890016643A (en) Metal thin film formation method of a semiconductor device
KR920005348A (en) Planarization method between metal layers of semiconductor device
KR950006994A (en) Via plug formation method of semiconductor device
KR920015550A (en) Method of manufacturing a capacitor
KR970051880A (en) Method of forming photoresist of semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application