KR940022706A - Via contact manufacturing method - Google Patents

Via contact manufacturing method Download PDF

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Publication number
KR940022706A
KR940022706A KR1019930004808A KR930004808A KR940022706A KR 940022706 A KR940022706 A KR 940022706A KR 1019930004808 A KR1019930004808 A KR 1019930004808A KR 930004808 A KR930004808 A KR 930004808A KR 940022706 A KR940022706 A KR 940022706A
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KR
South Korea
Prior art keywords
titanium nitride
film
nitride film
via contact
via hole
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Application number
KR1019930004808A
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Korean (ko)
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KR960006706B1 (en
Inventor
최경근
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019930004808A priority Critical patent/KR960006706B1/en
Publication of KR940022706A publication Critical patent/KR940022706A/en
Application granted granted Critical
Publication of KR960006706B1 publication Critical patent/KR960006706B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76844—Bottomless liners

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 비아콘택 제조방법에 있어서, 비아콘택 저항이 증대되는 것을 방지하기 위하여 제1도전층 배선 상부에 절연층을 형성하고, 절연층의 소정부분을 식각하여 제1도전층 배선이 노출된 비아홀을 형성하는 공정과, 비아홀과 절연층 상부에 저온에서 스퍼터링 텅스텐막을 얇은 두께 형성하고, 그 상부에 티타늄 나이트라이드막을 얇은 두께로 형성하는 공정과, 상기의 티타늄 나이트라이드막의 예정두께를 전면 식각하여 비아홀 저부의 스퍼터링 텅스텐막의 노출되게 하는 공정과, 비아홀에 CVD 텅스텐막을 선택적으로 증착하여 비아플러그를 형성하고, 전체구조 상부에 제2금속층을 증착하는 공정을 포함하는 기술이다.The present invention provides a via contact in which a via contact is formed by forming an insulating layer on an upper portion of a first conductive layer wiring and etching a predetermined portion of the insulating layer to prevent an increase in the via contact resistance. Forming a thin film on the via hole and the insulating layer at low temperature; forming a thin titanium nitride film on the upper portion; and etching the entire surface of the titanium nitride film to a predetermined thickness A process of exposing a bottom sputtering tungsten film, a process of selectively depositing a CVD tungsten film in a via hole, forming a via plug, and depositing a second metal layer over the entire structure.

Description

비아콘택 제조방법Via contact manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2a도 내지 제2c도는 본 발명에 의해 비아콘택 제조단계를 도시한 단면도.2a to 2c is a cross-sectional view showing a via contact manufacturing step according to the present invention.

Claims (4)

비아콘택 제조방법에 있어서, 제1도전층 배선 상부에 절연층을 형성하고, 절연층의 소정부분을 식각하여 제1도전층 배선이 노출된 비아홀을 형성하는 공정과, 비아홀과 절연층 상부에 저온에서 스퍼터링 텅스텐막을 얇은 두께 형성하고, 그 상부에 티타늄 나이트라이드막을 얇은 두께로 형성하는 공정과, 상기의 티타늄 나이트라이드막의 예정두께를 전면 식각공정으로 식각하여 비아홀 저부의 티타늄 나이트라이드막을 제거하여 스퍼터링 텅스텐막이 노출되게 하는 공정과, 비아홀에 CVD 텅스텐막을 선택적으로 증착하여 비아플러그를 형성하고, 전체구조 상부에 제2금속층을 증착하는 공정을 포함하는 비아콘택 제조방법.A method for manufacturing a via contact, comprising: forming an insulating layer on an upper portion of a first conductive layer wiring, etching a predetermined portion of the insulating layer to form a via hole exposing the first conductive layer wiring; To form a thin sputtered tungsten film, and to form a thin titanium nitride film on the upper portion, and to etch the predetermined thickness of the titanium nitride film by a front etching process to remove the titanium nitride film at the bottom of the via hole by sputtering tungsten A method of manufacturing a via contact, comprising: exposing a film, and selectively depositing a CVD tungsten film in a via hole to form a via plug, and depositing a second metal layer over the entire structure. 제1항에 있어서, 상기 스퍼터링 텅스텐막의 저온의 PVD 방법으로 1000Å 정도의 두께로 증착하는 것을 특징으로 하는 비아콘택 제조방법.The via contact manufacturing method according to claim 1, wherein the sputtering tungsten film is deposited at a thickness of about 1000 kW by a low temperature PVD method. 제1항에 있어서, 상기 티타늄 나이트라이드막은 PVD 방법으로 700Å 정도의 두께로 증착하는 것을 특징으로 하는 비아콘택 제조방법.The method of claim 1, wherein the titanium nitride film is deposited to a thickness of about 700 GPa by PVD. 제1항에 있어서, 상기 티타늄 나이트라이드막의 400Å 정도의 두께를 전면 식각하여 비아홀 저부의 스퍼터링 텅스텐막이 노출되게 하는 것을 특징으로 하는 비아콘택 제조방법.The method of claim 1, wherein the titanium nitride film is etched in a total thickness of about 400 mm to expose the sputtered tungsten film at the bottom of the via hole. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930004808A 1993-03-26 1993-03-26 Via contact manufacturing method KR960006706B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930004808A KR960006706B1 (en) 1993-03-26 1993-03-26 Via contact manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930004808A KR960006706B1 (en) 1993-03-26 1993-03-26 Via contact manufacturing method

Publications (2)

Publication Number Publication Date
KR940022706A true KR940022706A (en) 1994-10-21
KR960006706B1 KR960006706B1 (en) 1996-05-22

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KR1019930004808A KR960006706B1 (en) 1993-03-26 1993-03-26 Via contact manufacturing method

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399904B1 (en) * 1996-06-21 2003-12-24 주식회사 하이닉스반도체 Method for forming barrier metal film of semiconductor device
KR100445552B1 (en) * 2001-06-28 2004-08-21 동부전자 주식회사 Contact plug for a semiconductor device and method for fabricating the same
KR100526870B1 (en) * 2003-06-04 2005-11-09 삼성전자주식회사 Method for forming local interconnection line for use in semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399904B1 (en) * 1996-06-21 2003-12-24 주식회사 하이닉스반도체 Method for forming barrier metal film of semiconductor device
KR100445552B1 (en) * 2001-06-28 2004-08-21 동부전자 주식회사 Contact plug for a semiconductor device and method for fabricating the same
KR100526870B1 (en) * 2003-06-04 2005-11-09 삼성전자주식회사 Method for forming local interconnection line for use in semiconductor device

Also Published As

Publication number Publication date
KR960006706B1 (en) 1996-05-22

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