KR930006926A - Capacitor Manufacturing Method of Semiconductor Memory Device - Google Patents

Capacitor Manufacturing Method of Semiconductor Memory Device Download PDF

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Publication number
KR930006926A
KR930006926A KR1019910015942A KR910015942A KR930006926A KR 930006926 A KR930006926 A KR 930006926A KR 1019910015942 A KR1019910015942 A KR 1019910015942A KR 910015942 A KR910015942 A KR 910015942A KR 930006926 A KR930006926 A KR 930006926A
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KR
South Korea
Prior art keywords
oxide film
forming
gate
applying
memory device
Prior art date
Application number
KR1019910015942A
Other languages
Korean (ko)
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KR940009617B1 (en
Inventor
서현환
Original Assignee
문정환
금성일렉트론 주식회사
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019910015942A priority Critical patent/KR940009617B1/en
Publication of KR930006926A publication Critical patent/KR930006926A/en
Application granted granted Critical
Publication of KR940009617B1 publication Critical patent/KR940009617B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)

Abstract

본 발명은 반도체 메모리 소자의 캐패시터 제조방법에 관한 것으로, 특히 캐피시터의 용량을 증가시키기 위한 방법에 관한 것이다. 이를 위하여 본 발명에서는, 반도체 메모리 소자의 캐패시터 제조방법에 있어서, 실리콘 기판상에 필드 산화막 및 게이트를 형성한 후, 사이드 월 스페이서 형성을 위한 제1산화막을 도포하고 포토마스크를 게이트 상면의 3/1 지점에 형성하는 단계(a)와, 산화막을 식각하면서 포토마스크가 입혀지지 않은 게이트 측면의 사이드 월을 형성하는 단계(b)와, 사이드 월이 형성되지 않은, 게이트 상면의 3/1 지점에 포토 마스크를 입히고 이 산화막을 식각하여 사이드 월 및 게이트 상부의 산화막을 형성하는 단계(C)와, 제2산화막을 도포한 후 베리드 콘택을 정의하는 단계(d)와, 노드 폴리실리콘을 도포한 후 노드 마스크를 정의하고 노드 폴리 실리콘을 식각하는 단계(e)를 구비하여 이루어지는 반도체 메모리 소자의 캐패시터 제조방법.The present invention relates to a method for manufacturing a capacitor of a semiconductor memory device, and more particularly to a method for increasing the capacity of a capacitor. To this end, in the present invention, in the method of manufacturing a capacitor of a semiconductor memory device, after forming a field oxide film and a gate on a silicon substrate, a first oxide film for forming a sidewall spacer is coated and a photomask is applied to the top surface of the gate 3/1. Forming at a point (a), forming a sidewall of the gate side without etching the oxide film while etching the oxide film, and at a 3/1 point on the upper surface of the gate where the sidewall is not formed. (C) forming an oxide film on the sidewall and the gate by applying a mask and etching the oxide film, applying a second oxide film, and defining a buried contact (d), and then applying a node polysilicon And (e) defining a node mask and etching the node polysilicon.

Description

반도체 메모리 소자의 캐패시터 제조방법.A method for manufacturing a capacitor of a semiconductor memory device.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 반도체 메모리 소자의 캐패시터 제조방법.2 is a method of manufacturing a capacitor of a semiconductor memory device of the present invention.

Claims (1)

반도체 메모리 소자의 캐패시터 제조방법에 있어서, 실리콘 기판상에 필드 산화막 및 게이트를 형성한 후 사이드 월 스페이서 형성을 위한 제1산화막을 도포하고 포토마스크를 게이트 상면의 3/1지점에 형성하는 단계(a)와, 상기 산화막을 식각하면서 포토마스크가 입혀지지 않은 게이트 측면의 사이드 월을 형성하는 단계(b)와, 사이드 월이 형성되지 않은 게이트 상면의 3/1 지점에 포토 마스크를 입히고 상기 산화막을 식각하여 사이드 월 및 게이트 상부의 산화막을 형성하는 단계(C)와, 제2산화막을 도포한 후 베리드 콘택을 정의하는 단계(d)와, 노드 폴리실리콘을 도포한 후 노드 마스크를 정의하고 노드 폴리 실리콘을 식각하는 단계(e)를 구비하여 이루어지는 반도체 메모리 소자의 캐패시터 제조방법.A method of manufacturing a capacitor of a semiconductor memory device, comprising: forming a field oxide film and a gate on a silicon substrate, applying a first oxide film for forming a sidewall spacer, and forming a photomask at a 3/1 point on the upper surface of the gate (a And (b) forming sidewalls of the gate side where the photomask is not coated while the oxide film is etched, and applying a photo mask to 3/1 of the upper surface of the gate where the sidewalls are not formed and etching the oxide film. (C) forming an oxide layer on the sidewalls and the gate, a step of defining a buried contact after applying the second oxide layer, and defining a node mask after applying the node polysilicon. A method of manufacturing a capacitor of a semiconductor memory device comprising the step (e) of etching silicon. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910015942A 1991-09-12 1991-09-12 Method of manufacturing capacitor of semiconductor memory device KR940009617B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910015942A KR940009617B1 (en) 1991-09-12 1991-09-12 Method of manufacturing capacitor of semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910015942A KR940009617B1 (en) 1991-09-12 1991-09-12 Method of manufacturing capacitor of semiconductor memory device

Publications (2)

Publication Number Publication Date
KR930006926A true KR930006926A (en) 1993-04-22
KR940009617B1 KR940009617B1 (en) 1994-10-15

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ID=19319882

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910015942A KR940009617B1 (en) 1991-09-12 1991-09-12 Method of manufacturing capacitor of semiconductor memory device

Country Status (1)

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KR (1) KR940009617B1 (en)

Also Published As

Publication number Publication date
KR940009617B1 (en) 1994-10-15

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