KR940008072A - Capacitor manufacturing method having high storage capacity of semiconductor device - Google Patents

Capacitor manufacturing method having high storage capacity of semiconductor device Download PDF

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Publication number
KR940008072A
KR940008072A KR1019920015856A KR920015856A KR940008072A KR 940008072 A KR940008072 A KR 940008072A KR 1019920015856 A KR1019920015856 A KR 1019920015856A KR 920015856 A KR920015856 A KR 920015856A KR 940008072 A KR940008072 A KR 940008072A
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KR
South Korea
Prior art keywords
insulating layer
silicon layer
layer
etching
storage capacity
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KR1019920015856A
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Korean (ko)
Inventor
김대영
김재갑
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김주용
현대전자산업 주식회사
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Priority to KR1019920015856A priority Critical patent/KR940008072A/en
Publication of KR940008072A publication Critical patent/KR940008072A/en

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Abstract

본 발명은 반도체 DRAM 소자에 있어서 가장 중요한 것 중의 하나인 캐패시터 제조 방법에 관한 것으로, 반도체 기판(1), 상기 반도체기판(1)에 형성되어진 소자분리절연막(2), 소오스(3), 드레인(3′), 게이트산화막(4), 게이트전극(5)을 갖는 반도체 소자의 고축적 용량을 갖는 캐패시터 제조 방법에 있어서, MOSFET 상에 전체적으로 제1절연층(6)을 도포한 다음 마스크 패턴하여 상기 제1절연층(6)을 선택 식각하여 상기 소오스(3)에 콘택홀을 형성하고 제1실리콘층(7)과 제2절연층(8)을 차례로 증착하는 제1단계, 상기 제1단계 후에 전하보존전극 마스크를 이용하여 상기 제2절연층(8), 제1실리콘층(7)을 차례로 식각 하는 제2단계, 상기 제2단계 후에 제2실리콘층(9)을 증착하는 제3단계, 상기 제3단계후에 상기 제2절연층(8)이 드러나도록 상기 제2실리콘층(9)을 전면식각(blanket etch)하고 상기 제2절연층(8)을 식각 하는 제4단계로 구비되는 것을 특징으로 하는 반도체 소장의 고축적 용량을 갖는 캐패시터 제조 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor, which is one of the most important things in a semiconductor DRAM device. The present invention relates to a semiconductor substrate 1, a device isolation insulating film 2 formed on the semiconductor substrate 1, a source 3, and a drain ( 3 '), a capacitor having a high storage capacity of a semiconductor device having a gate oxide film 4 and a gate electrode 5, wherein the first insulating layer 6 is coated on the MOSFET as a whole, followed by a mask pattern. Selectively etching the first insulating layer 6 to form contact holes in the source 3, and subsequently depositing the first silicon layer 7 and the second insulating layer 8, after the first step. A second step of sequentially etching the second insulating layer 8 and the first silicon layer 7 by using a charge preserving electrode mask, a third step of depositing the second silicon layer 9 after the second step, After the third step, the second silicon layer 9 is entirely etched (b) to expose the second insulating layer 8. and a fourth step of etching the second insulating layer 8 by lanket etch).

Description

반도체 소자의 고축적 용량을 갖는 캐패시터 제조 방법Capacitor manufacturing method having high storage capacity of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 반도체 소자의 캐패시터 제조 공정도.1 is a capacitor manufacturing process diagram of a semiconductor device according to the present invention.

Claims (3)

반도체기판(1), 상기 반도체기판(1)에 형성되어진 소자분리 절연막(2), 소오스(3), 드레인(3′), 게이트산화막(4), 게이트전극(5)을 갖는 반도체 소자의 고축적 용량을 갖는 캐패시터 제조 방법에 있어서, MOSFET 상에 전체적으로 제1절연층(6)을 도포한 다음 마스크 패턴하여 상기 제1절연층(6)을 선택 식각하여 상기 소오스(3)에 콘택홀을 형성하고 제1실리콘층(7)과 제2절연층(8)을 차례로 증착하는 제1단계, 상기 제1단계 후에 전하보존전극 마스크를 이용하여 상기 제2절연층(8), 제1실리콘층(7)을 차례로 식각 하는 제2단계, 상기 제2단계 후에 제2실리콘층(9)을 증착하는 제3단계,및 상기 제3단계 후에 상기 제2절연층(8)이 드러나도록 상기 제2실리콘층(9)을 전면식각(blanket etch)하고 상기 제2절연층(8)을 식각 하는 제4단계로 구비되는 것을 특징으로 하는 반도체 소자의 고축적 용량을 갖는 캐패시터 제조방법.A semiconductor device having a semiconductor substrate 1, a device isolation insulating film 2 formed on the semiconductor substrate 1, a source 3, a drain 3 ', a gate oxide film 4, and a gate electrode 5 In the method of manufacturing a capacitor having a storage capacity, a first insulating layer 6 is entirely coated on a MOSFET and then mask-patterned to selectively etch the first insulating layer 6 to form contact holes in the source 3. And a first step of depositing the first silicon layer 7 and the second insulating layer 8 in sequence, and after the first step, the second insulating layer 8 and the first silicon layer (using a charge storage electrode mask). A second step of sequentially etching 7), a third step of depositing a second silicon layer 9 after the second step, and the second silicon to expose the second insulating layer 8 after the third step. And a fourth step of etching the second insulating layer 8 by blanket etching the layer 9. Capacitor manufacturing method having a high storage capacity. 제1항에 있어서, 상기 제2절연층(8)의 삭각은 비등방성 식각이고, 상기 제1실리콘층(7)은 SR6가스를 이용하여 등방성 식각을 하여 상기 제2절연층(8)의 밑부분의 어느정도까지 언더컬(under cut)식각을 하는 것을 특징으로 하는 반도체 소자의 고축적 용량을 갖는 캐패시터 제조 방법.The method of claim 1, wherein the second insulating layer 8 is anisotropically etched, and the first silicon layer 7 is anisotropically etched using SR 6 gas to form the second insulating layer 8. A method of manufacturing a capacitor having a high storage capacity of a semiconductor device, characterized in that the under cut (under cut) to a certain degree of the bottom portion. 제1항에 있어서, 상기 전면식각은 수직으로 식각되어 각각의 제2실리콘층(9)이 단락되어 전하보존전극을 형성하게 되고 상기 제2절연층(8)의 측벽에 형성되어 있던 상기 제2실리콘층(9)은 스페이서를 형성하는 것을 특징으로 하는 반도체 소자의 고축적 용량을 갖는 캐패시터 제조 방법.2. The second etching method of claim 1, wherein the front surface etching is vertically etched so that each second silicon layer 9 is short-circuited to form a charge storage electrode and formed on a sidewall of the second insulating layer 8. The method of manufacturing a capacitor having a high storage capacity of a semiconductor device, characterized in that the silicon layer (9) forms a spacer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920015856A 1992-09-01 1992-09-01 Capacitor manufacturing method having high storage capacity of semiconductor device KR940008072A (en)

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KR1019920015856A KR940008072A (en) 1992-09-01 1992-09-01 Capacitor manufacturing method having high storage capacity of semiconductor device

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000063609A (en) * 2000-07-25 2000-11-06 석미수 Process for producing yarn containing yeast ions and fibers made therefrom.
KR100625643B1 (en) * 2004-06-18 2006-09-20 (주)코니산교 Luminescence Accessory with A Separated Type of Switch

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000063609A (en) * 2000-07-25 2000-11-06 석미수 Process for producing yarn containing yeast ions and fibers made therefrom.
KR100625643B1 (en) * 2004-06-18 2006-09-20 (주)코니산교 Luminescence Accessory with A Separated Type of Switch

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