KR930003251B1 - 다이나믹형 반도체기억장치와 그 기능 테스트장치 및 테스트방법 - Google Patents

다이나믹형 반도체기억장치와 그 기능 테스트장치 및 테스트방법 Download PDF

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Publication number
KR930003251B1
KR930003251B1 KR1019890016243A KR890016243A KR930003251B1 KR 930003251 B1 KR930003251 B1 KR 930003251B1 KR 1019890016243 A KR1019890016243 A KR 1019890016243A KR 890016243 A KR890016243 A KR 890016243A KR 930003251 B1 KR930003251 B1 KR 930003251B1
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KR
South Korea
Prior art keywords
data
memory cell
memory cells
bit line
output
Prior art date
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KR1019890016243A
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English (en)
Korean (ko)
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KR900008517A (ko
Inventor
마사끼 구마노야
가쓰미 도우사가
야스히로 고니시
다가히로 고마쓰
요시노리 이노우에
Original Assignee
미쓰비시 뎅끼 가부시끼가이샤
시기 모리야
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Application filed by 미쓰비시 뎅끼 가부시끼가이샤, 시기 모리야 filed Critical 미쓰비시 뎅끼 가부시끼가이샤
Publication of KR900008517A publication Critical patent/KR900008517A/ko
Application granted granted Critical
Publication of KR930003251B1 publication Critical patent/KR930003251B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

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  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
KR1019890016243A 1988-11-16 1989-11-09 다이나믹형 반도체기억장치와 그 기능 테스트장치 및 테스트방법 KR930003251B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP63-290705 1988-11-16
JP63290705A JPH0821239B2 (ja) 1988-11-16 1988-11-16 ダイナミック型半導体記憶装置およびそのテスト方法
JP88-290705 1988-11-16

Publications (2)

Publication Number Publication Date
KR900008517A KR900008517A (ko) 1990-06-04
KR930003251B1 true KR930003251B1 (ko) 1993-04-24

Family

ID=17759448

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890016243A KR930003251B1 (ko) 1988-11-16 1989-11-09 다이나믹형 반도체기억장치와 그 기능 테스트장치 및 테스트방법

Country Status (3)

Country Link
JP (1) JPH0821239B2 (zh)
KR (1) KR930003251B1 (zh)
CN (1) CN1014659B (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100300033B1 (ko) * 1998-02-03 2001-10-19 김영환 반도체메모리회로
JP2003317499A (ja) * 2002-04-26 2003-11-07 Mitsubishi Electric Corp 半導体記憶装置およびそれを用いたメモリシステム
US7073100B2 (en) * 2002-11-11 2006-07-04 International Business Machines Corporation Method for testing embedded DRAM arrays
DE10358026B3 (de) * 2003-12-11 2005-05-19 Infineon Technologies Ag Verfahren zur Verbesserung des Lesesignals in einem Speicher mit passiven Speicherelementen
CN100401371C (zh) * 2004-02-10 2008-07-09 恩益禧电子股份有限公司 能够实现高速访问的图像存储器结构
CN102842344B (zh) * 2012-08-24 2015-04-01 湖北航天技术研究院计量测试技术研究所 Eeprom读写周期时间的测试方法
KR102166731B1 (ko) * 2013-05-31 2020-10-16 에스케이하이닉스 주식회사 데이터 전달회로 및 이를 포함하는 메모리
CN103839592B (zh) * 2014-03-05 2017-06-06 上海华虹宏力半导体制造有限公司 用于嵌入式快闪存储器的内建自测试方法及装置
CN115798562B (zh) * 2023-02-13 2023-04-28 长鑫存储技术有限公司 一种存储阵列故障检测方法、装置和存储介质
CN116564400B (zh) * 2023-07-07 2023-11-28 长鑫存储技术有限公司 半导体存储装置的可测试性电路和数据测试方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0748317B2 (ja) * 1987-10-01 1995-05-24 日本電気株式会社 半導体メモリ検査方式

Also Published As

Publication number Publication date
JPH02137185A (ja) 1990-05-25
CN1042792A (zh) 1990-06-06
JPH0821239B2 (ja) 1996-03-04
CN1014659B (zh) 1991-11-06
KR900008517A (ko) 1990-06-04

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