KR920013197A - Laser printer engine connection control data transmission circuit - Google Patents

Laser printer engine connection control data transmission circuit Download PDF

Info

Publication number
KR920013197A
KR920013197A KR1019900021483A KR900021483A KR920013197A KR 920013197 A KR920013197 A KR 920013197A KR 1019900021483 A KR1019900021483 A KR 1019900021483A KR 900021483 A KR900021483 A KR 900021483A KR 920013197 A KR920013197 A KR 920013197A
Authority
KR
South Korea
Prior art keywords
transmission
unit
signal
output
control unit
Prior art date
Application number
KR1019900021483A
Other languages
Korean (ko)
Other versions
KR930002353B1 (en
Inventor
성무경
Original Assignee
정용문
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019900021483A priority Critical patent/KR930002353B1/en
Publication of KR920013197A publication Critical patent/KR920013197A/en
Application granted granted Critical
Publication of KR930002353B1 publication Critical patent/KR930002353B1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K15/00Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
    • G06K15/02Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
    • G06K15/12Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by photographic printing, e.g. by laser printers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Or Security For Electrophotography (AREA)

Abstract

내용 없음No content

Description

레이저 프린터 엔진 접속 제어 데이터 전송회로Laser printer engine connection control data transmission circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 데이타 전송회로, 제2도는 제1도의 각부분의 동작 파형도.1 is a data transmission circuit according to the present invention, and FIG. 2 is an operational waveform diagram of each part of FIG.

Claims (3)

제어부와 프린터 엔진부를 가지는 레이저 프린터 엔진 접속제어 데이터 전송회로에 있어서, 상기 제어부에 접속되어 있으며, 상기 제어부로부터 전송되어지는 전송상태 제어신호에 응답하여 전송 알람신호를 발생하는 전송상태 알람부(16)와, 상기 제어부와 엔진부 상이에 접속되어 있으며 상기 제어부로 부터 전송되는 병렬 제어데이터를 라이트에 의해 래치하고, 전송클럭입력에 응답하여 직렬 변환 전송하는 데이터 전송부(22)와, 소정 주기의 클럭을 발생하는 클럭 발생기(24)와, 상기 클럭발생기(24)와 전송상태 알람부(16)에 접속되어 있으며, 상기 전송상태 알람부(16)의 전송상태 알람부(16)에 접속되어 있으며, 상기 전송상태 알람부(16)의 전송상태 알람신호신호출력에 의해 동작되어 상기 클럭발생기(24)의 출력을 소정분중하여 출력함과 동시에 분주클럭을 카운트하여 소정수가 카운팅 완료시 카운팅 완료신호를 출력하는 클럭발생부(38)와, 상기 전송상태 알람부(16)와 클럭발생부(38)에 접속되어 있으며 상기 전송상태 알람부(10)의 전송 알람신호입력에 의해 게이팅 신호를 출력하고, 상기 클럭발생부(38)의 카운트 완료 신호에 의해 제어 데이터 전송완료신호와 상기 게이팅 신호를 차단하는 전송제어부(50)와, 상기 클럭발생부(38)와 상기 전송제어부(50)의 출력단자에 접속되어 상기 전송제어부(50)의 게이팅신호 출력에 의해 상기 클럭발생부(38)의 분주클럭을 상기 데이터 전송부(22)와 엔진부로 전송하는 게이트(52)로 구성됨을 특징으로하는 레이저 프린터 엔진 접속제어 데이터 전송회로.In a laser printer engine connection control data transmission circuit having a control unit and a printer engine unit, a transmission state control signal connected to the control unit and transmitted from the control unit. Alarm signal sent in response to The transmission state alarm unit 16 for generating a control unit and the parallel control data transmitted from the control unit connected to the control unit and the engine unit are written. Latched by the transmission clock It is connected to a data transmission unit 22 for serial conversion transmission in response to an input, a clock generator 24 for generating a clock of a predetermined period, and the clock generator 24 and the transmission state alarm unit 16. It is connected to the transmission status alarm section 16 of the transmission status alarm section 16, and the transmission status alarm signal of the transmission status alarm section 16. A clock generator 38 which is operated by a signal output and outputs the output of the clock generator 24 by a predetermined amount, and at the same time counts the divided clocks and outputs a counting completion signal when a predetermined number is completed; The transmission alarm signal of the transmission state alarm unit 10 is connected to the alarm unit 16 and the clock generator 38. A gating signal is output by an input, and a control data transmission completion signal is generated by the count completion signal of the clock generator 38. And a transmission control unit 50 for blocking the gating signal, and an output terminal of the clock generation unit 38 and the transmission control unit 50 to output the gating signal of the transmission control unit 50 to the clock generation unit. And a gate (52) for transmitting the divided clock of (38) to the data transmission unit (22) and the engine unit. 제1항에 있어서, 전송상태 알람부(16)가 제어부로 부터 출력되는 전송 상태 데이터를 전송상태 제어신호의 신호를 래치하여 전송알람신호를 출력하는 래치(D형 플립플롭)(12)와, 상기 래치(12)의 출력을 반전하여 출력하는 2개의 인버터(14)(21)로 구성됨을 특징으로 하는 레이저 프린터 엔진 접속제어 데이터 전송회로.The transmission state control signal of claim 1, wherein the transmission state alarm unit 16 transmits the transmission state data output from the control unit. Alarm signal by latching A laser printer engine connection control data transmission circuit comprising: a latch (D flip-flop) 12 for outputting a signal; and two inverters 14, 21 for inverting and outputting the output of the latch 12. . 제1항에 있어서, 데이터 전송부(22)가 제어부의 데이터 출력단자 및 제어신호단자에 접속되어 상기 제어부로부터 출력되는 병렬 제어데이터를 제어데이터 기록신호에 의해 래치하고 전송클럭에 의해 직렬 변환 출력하는 시프트레지스터(10)와, 상기 시프트레지스터(10)의 출력단자에 접속되어 있으며 상기 시프트 전송클럭의 입력에 의해 동기 전송하는 래치(18)와 상기 래치(18)의 출력에 접속되어 상기 출력을 제어데이터로서 드라이브하는 인버터(20)으로 구성됨을 특징으로 하는 레이터 프린터 엔진 접속제어 데이터 전송회로.The control data recording signal according to claim 1, wherein the data transmission unit (22) is connected to the data output terminal and the control signal terminal of the control unit to output parallel control data output from the control unit. Latched by the transmission clock Is connected to the shift register 10 for serial-converting output by means of the shift register and the output terminal of the shift register 10. Connected to the latch 18 and the output of the latch 18 for synchronous transfer by the input of the control data The inverter printer engine connection control data transmission circuit, characterized in that consisting of an inverter 20 for driving as. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900021483A 1990-12-22 1990-12-22 Laser printer engine connection control data sending circuits KR930002353B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900021483A KR930002353B1 (en) 1990-12-22 1990-12-22 Laser printer engine connection control data sending circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900021483A KR930002353B1 (en) 1990-12-22 1990-12-22 Laser printer engine connection control data sending circuits

Publications (2)

Publication Number Publication Date
KR920013197A true KR920013197A (en) 1992-07-28
KR930002353B1 KR930002353B1 (en) 1993-03-29

Family

ID=19308193

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900021483A KR930002353B1 (en) 1990-12-22 1990-12-22 Laser printer engine connection control data sending circuits

Country Status (1)

Country Link
KR (1) KR930002353B1 (en)

Also Published As

Publication number Publication date
KR930002353B1 (en) 1993-03-29

Similar Documents

Publication Publication Date Title
KR950012314A (en) Display drive device and data transmission method
KR920018640A (en) LCD driving circuit
KR960025082A (en) Data transmission device
KR870001521A (en) Floppy disk drive interface circuit
KR920013197A (en) Laser printer engine connection control data transmission circuit
KR910007266A (en) Clock and Control Signal Generation Circuit
KR890004335A (en) Delayed flip-flop device using TTL
KR100249019B1 (en) Frequency dividing circuit
KR960026743A (en) Data transmission device
SU1596331A2 (en) Device for checking adders
SU1599969A1 (en) Single-phase d flip-flop
KR0184153B1 (en) Frequency divider circuit
JP2667671B2 (en) Data output device
SU595888A1 (en) Majority device
KR950001175B1 (en) Improved data shift register
KR900004864B1 (en) The circuit of generation of 1bit to 4bit data clock
KR960006272A (en) Primary / dependent flip-flop
KR940027299A (en) Modular Clock Signal Generation Circuit
KR960025025A (en) Interface circuit for matching process matching boards for electronic switchboards and personal computers
KR970056528A (en) Analog Bus / I ^ 2C Bus Protocol Converters
KR970016966A (en) Latches Data Storage Circuit
KR920001839A (en) System Clock Generation Circuit of Digital System
KR950022076A (en) Serial communication circuit
KR940017404A (en) Data Retiming Circuit of Transmission System
KR950027566A (en) Bit Interleaved Parity Generation Circuit

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030227

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee