KR890007396A - Isolation Method of Semiconductor Devices Using Laminated Structure Film - Google Patents

Isolation Method of Semiconductor Devices Using Laminated Structure Film Download PDF

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Publication number
KR890007396A
KR890007396A KR870011756A KR870011756A KR890007396A KR 890007396 A KR890007396 A KR 890007396A KR 870011756 A KR870011756 A KR 870011756A KR 870011756 A KR870011756 A KR 870011756A KR 890007396 A KR890007396 A KR 890007396A
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South Korea
Prior art keywords
laminated structure
silicon nitride
structure film
nitride film
film
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Application number
KR870011756A
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Korean (ko)
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KR900001274B1 (en
Inventor
유재안
이앙구
최진석
황용운
Original Assignee
강진구
삼성반도체통신 주식회사
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Priority to KR1019870011756A priority Critical patent/KR900001274B1/en
Publication of KR890007396A publication Critical patent/KR890007396A/en
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Publication of KR900001274B1 publication Critical patent/KR900001274B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

내용 없음No content

Description

적층 구조막을 이용한 반도체 소자의 격리방법Isolation Method of Semiconductor Devices Using Laminated Structure Film

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2a∼2g도는 본 발명 적층 구조막을 이용한 반도체 소자의 격리를 형성하는 공정도.2A to 2G are process drawings for forming an isolation of a semiconductor device using the laminated structure film of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 실리콘 기판 2, 4 : 질화규소막1: silicon substrate 2, 4: silicon nitride film

3 : 산화 규소막 5 : 감광액3: silicon oxide film 5: photosensitive liquid

6 : 적층 구조막 7 : 찬넬스톱 불순물6: laminated structure film 7: channel stop impurity

8 : 필드 산화 규소막 9 : 패드 산화 규소막8: field silicon oxide film 9: pad silicon oxide film

10 : 질소 규소막 11 : 버드빅(BIRD'S BEAK)10: nitrogen silicon film 11: BIRD'S BEAK

12 : 소자영역12: device area

Claims (4)

반도체 소자의 디바이스를 구성하는 각 소자를 전기적으로 격리함에 있어서, 실리콘 기판(1)상에 질화 규소막(2)과 산화 규소막(3) 및 질화 규소막(4)을 저압화학 증착법에 의하여 각각 증착시켜 적층 구조막(6)을 형성하고, 상기 적층 구조막(6)상에 감광액(5)을 도포하여 정렬 노광후 현상하며, 이를 건식 식각을 진행하여 소자영역과 소자 분리영역으로 구분한 후 이온 주입법에 의한 찬넬 스톱용 불순물(7)을 소자 격리영역에 주입하여 감광액(5)을 완전히 제거하고, 열산화법에 의하여 소자 격리영역을 산화시켜 소자 격리를 함을 특징으로 한 적층 구조막을 이용한 반도체 소자의 격리방법.In electrically isolating each element constituting the semiconductor device, the silicon nitride film 2, the silicon oxide film 3, and the silicon nitride film 4 are respectively formed on the silicon substrate 1 by a low pressure chemical vapor deposition method. After the deposition to form a laminated structure film (6), by applying a photosensitive liquid (5) on the laminated structure film (6) developed after alignment exposure, this is subjected to dry etching to divide the device region and device isolation region A semiconductor using a laminated structure film characterized in that the channel stop impurity (7) is injected into the device isolation region by ion implantation to completely remove the photoresist (5), and the device isolation region is oxidized by thermal oxidation. Device isolation method. 제1항에 있어서 질화규소막(2) 및 질화규소막(4)을 열산화법에 의하여 산화함을 특징으로한 적층구조막을 이용한 반도체 소자의 격리방법.A method for isolating a semiconductor device using a laminated structure film according to claim 1, wherein the silicon nitride film (2) and the silicon nitride film (4) are oxidized by a thermal oxidation method. 제1항에 있어서 질화 규소막(2)의 두께를 150Å이하로 유지함을 특징으로 한 적층 구조막을 이용한 반도체 소자의 격리방법.A method of isolating a semiconductor device using a laminated structure film according to claim 1, wherein the thickness of the silicon nitride film (2) is maintained at 150 kPa or less. 제1항에 있어서 질화 규소막(4)의 두께를 250Å이하로 유지함을 특징으로 한 적층 구조막을 이용한 반도체 소자의 격리방법.The method of isolation of a semiconductor device using a laminated structure film according to claim 1, wherein the thickness of the silicon nitride film (4) is maintained at 250 kPa or less. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870011756A 1987-10-22 1987-10-22 Isolation of semiconductor device KR900001274B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870011756A KR900001274B1 (en) 1987-10-22 1987-10-22 Isolation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870011756A KR900001274B1 (en) 1987-10-22 1987-10-22 Isolation of semiconductor device

Publications (2)

Publication Number Publication Date
KR890007396A true KR890007396A (en) 1989-06-19
KR900001274B1 KR900001274B1 (en) 1990-03-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870011756A KR900001274B1 (en) 1987-10-22 1987-10-22 Isolation of semiconductor device

Country Status (1)

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KR (1) KR900001274B1 (en)

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Publication number Publication date
KR900001274B1 (en) 1990-03-05

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