KR880700969A - 데이타 프로세서 제어유닛 - Google Patents

데이타 프로세서 제어유닛

Info

Publication number
KR880700969A
KR880700969A KR870700645A KR870700645A KR880700969A KR 880700969 A KR880700969 A KR 880700969A KR 870700645 A KR870700645 A KR 870700645A KR 870700645 A KR870700645 A KR 870700645A KR 880700969 A KR880700969 A KR 880700969A
Authority
KR
South Korea
Prior art keywords
control unit
data processor
processor control
data
unit
Prior art date
Application number
KR870700645A
Other languages
English (en)
Other versions
KR940009100B1 (ko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of KR880700969A publication Critical patent/KR880700969A/ko
Application granted granted Critical
Publication of KR940009100B1 publication Critical patent/KR940009100B1/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
KR1019870700645A 1985-11-27 1986-11-10 데이타 프로세서 제어 유닛과 지시사이클 및 오버헤드 최소화 방법 KR940009100B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US06/802,491 US4709324A (en) 1985-11-27 1985-11-27 Data processor control unit having an interrupt service using instruction prefetch redirection
US802.491 1985-11-27
PCT/US1986/002466 WO1987003394A1 (en) 1985-11-27 1986-11-10 A data processor control unit having an interrupt service using instruction prefetch redirection

Publications (2)

Publication Number Publication Date
KR880700969A true KR880700969A (ko) 1988-04-13
KR940009100B1 KR940009100B1 (ko) 1994-09-29

Family

ID=25183841

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870700645A KR940009100B1 (ko) 1985-11-27 1986-11-10 데이타 프로세서 제어 유닛과 지시사이클 및 오버헤드 최소화 방법

Country Status (13)

Country Link
US (1) US4709324A (ko)
EP (1) EP0247175B1 (ko)
JP (1) JPH083791B2 (ko)
KR (1) KR940009100B1 (ko)
CN (1) CN1009396B (ko)
AU (1) AU6779687A (ko)
CA (1) CA1265873A (ko)
DE (1) DE3681733D1 (ko)
FI (1) FI90804C (ko)
HK (1) HK5294A (ko)
IL (1) IL80499A (ko)
SG (1) SG130093G (ko)
WO (1) WO1987003394A1 (ko)

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JP3230262B2 (ja) * 1992-01-24 2001-11-19 ソニー株式会社 電子装置及びその固定情報修正方法
US5805902A (en) * 1993-07-02 1998-09-08 Elonex I.P. Holdings, Ltd. Structure and method for issuing interrupt requests as addresses and for decoding the addresses issued as interrupt requests
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US5475822A (en) * 1993-11-15 1995-12-12 Motorola, Inc. Data processing system for resuming instruction execution after an interrupt and method therefor
JPH07244649A (ja) * 1994-03-08 1995-09-19 Fujitsu Ltd 割込処理分散方式
US5889973A (en) * 1995-03-31 1999-03-30 Motorola, Inc. Method and apparatus for selectively controlling interrupt latency in a data processing system
US6052801A (en) * 1995-05-10 2000-04-18 Intel Corporation Method and apparatus for providing breakpoints on a selectable address range
US5659679A (en) * 1995-05-30 1997-08-19 Intel Corporation Method and apparatus for providing breakpoints on taken jumps and for providing software profiling in a computer system
US5621886A (en) * 1995-06-19 1997-04-15 Intel Corporation Method and apparatus for providing efficient software debugging
US5740413A (en) * 1995-06-19 1998-04-14 Intel Corporation Method and apparatus for providing address breakpoints, branch breakpoints, and single stepping
US5687339A (en) * 1995-09-14 1997-11-11 Elan Microelectronics Corp. Pre-reading and pre-decoding of instructions of a microprocessor within single cycle
US5954819A (en) * 1996-05-17 1999-09-21 National Semiconductor Corporation Power conservation method and apparatus activated by detecting programmable signals indicative of system inactivity and excluding prefetched signals
US6785803B1 (en) * 1996-11-13 2004-08-31 Intel Corporation Processor including replay queue to break livelocks
US5907712A (en) * 1997-05-30 1999-05-25 International Business Machines Corporation Method for reducing processor interrupt processing time by transferring predetermined interrupt status to a system memory for eliminating PIO reads from the interrupt handler
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US6044430A (en) * 1997-12-17 2000-03-28 Advanced Micro Devices Inc. Real time interrupt handling for superscalar processors
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US7401205B1 (en) * 1999-08-13 2008-07-15 Mips Technologies, Inc. High performance RISC instruction set digital signal processor having circular buffer and looping controls
US6889279B2 (en) * 2000-12-11 2005-05-03 Cadence Design Systems, Inc. Pre-stored vector interrupt handling system and method
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US7467178B2 (en) 2001-06-01 2008-12-16 Microchip Technology Incorporated Dual mode arithmetic saturation processing
US7020788B2 (en) 2001-06-01 2006-03-28 Microchip Technology Incorporated Reduced power option
US6937084B2 (en) 2001-06-01 2005-08-30 Microchip Technology Incorporated Processor with dual-deadtime pulse width modulation generator
US6975679B2 (en) 2001-06-01 2005-12-13 Microchip Technology Incorporated Configuration fuses for setting PWM options
US6952711B2 (en) 2001-06-01 2005-10-04 Microchip Technology Incorporated Maximally negative signed fractional number multiplication
US6976158B2 (en) 2001-06-01 2005-12-13 Microchip Technology Incorporated Repeat instruction with interrupt
US20020184566A1 (en) 2001-06-01 2002-12-05 Michael Catherwood Register pointer trap
US7003543B2 (en) 2001-06-01 2006-02-21 Microchip Technology Incorporated Sticky z bit
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JP4247132B2 (ja) * 2004-01-29 2009-04-02 株式会社ルネサステクノロジ 情報処理装置
CN102141904B (zh) * 2011-03-31 2014-02-12 杭州中天微系统有限公司 支持中断屏蔽指令的数据处理器
US9378164B2 (en) * 2011-12-22 2016-06-28 Intel Corporation Interrupt return instruction with embedded interrupt service functionality
CN111190658B (zh) * 2020-01-08 2023-02-28 乐鑫信息科技（上海）股份有限公司 一种基于片内执行且在不具有MMU的SoC片上支持应用程序动态加载的系统

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Also Published As

Publication number Publication date
FI873030A (fi) 1987-07-08
JPH083791B2 (ja) 1996-01-17
US4709324A (en) 1987-11-24
FI90804C (fi) 1994-03-25
JPS63501454A (ja) 1988-06-02
WO1987003394A1 (en) 1987-06-04
HK5294A (en) 1994-01-28
EP0247175B1 (en) 1991-09-25
EP0247175A1 (en) 1987-12-02
CN1009396B (zh) 1990-08-29
CN86107934A (zh) 1987-08-12
DE3681733D1 (de) 1991-10-31
FI873030A0 (fi) 1987-07-08
IL80499A0 (en) 1987-02-27
IL80499A (en) 1990-06-10
FI90804B (fi) 1993-12-15
EP0247175A4 (en) 1988-03-22
SG130093G (en) 1994-02-25
KR940009100B1 (ko) 1994-09-29
CA1265873A (en) 1990-02-13
AU6779687A (en) 1987-07-01

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E701 Decision to grant or registration of patent right
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