JP4247132B2 - 情報処理装置 - Google Patents
情報処理装置 Download PDFInfo
- Publication number
- JP4247132B2 JP4247132B2 JP2004021207A JP2004021207A JP4247132B2 JP 4247132 B2 JP4247132 B2 JP 4247132B2 JP 2004021207 A JP2004021207 A JP 2004021207A JP 2004021207 A JP2004021207 A JP 2004021207A JP 4247132 B2 JP4247132 B2 JP 4247132B2
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- instruction
- buffer
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- Prior art date
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- 230000010365 information processing Effects 0.000 title claims description 42
- 238000000034 method Methods 0.000 claims description 14
- 238000002360 preparation method Methods 0.000 claims description 4
- 239000013598 vector Substances 0.000 description 25
- 238000010586 diagram Methods 0.000 description 21
- 230000007704 transition Effects 0.000 description 16
- 238000004364 calculation method Methods 0.000 description 13
- BDEDPKFUFGCVCJ-UHFFFAOYSA-N 3,6-dihydroxy-8,8-dimethyl-1-oxo-3,4,7,9-tetrahydrocyclopenta[h]isochromene-5-carbaldehyde Chemical compound O=C1OC(O)CC(C(C=O)=C2O)=C1C1=C2CC(C)(C)C1 BDEDPKFUFGCVCJ-UHFFFAOYSA-N 0.000 description 7
- 230000004044 response Effects 0.000 description 6
- 230000000630 rising effect Effects 0.000 description 5
- 101000915578 Homo sapiens Zinc finger HIT domain-containing protein 3 Proteins 0.000 description 4
- 102100028598 Zinc finger HIT domain-containing protein 3 Human genes 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 238000003708 edge detection Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 101100396930 Pseudomonas aeruginosa imm1 gene Proteins 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 101150006932 RTN1 gene Proteins 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/382—Pipelined decoding, e.g. using predecoding
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Executing Machine-Instructions (AREA)
Description
本発明の実施の形態1を、図1〜図10に基づいて説明する。
ビット15〜4:エントリ
ビット3〜1:同一エントリ内の命令あるいはデータの位置
ビット0:命令あるいはデータの上位8ビット、下位8ビット
の以上を区別する役割を持つ。
0:先読みなし
1:割り込みベクタの先読みを要求
2:割り込みルーチン先頭命令先読みを要求
3:割り込み復帰先命令先読みを要求
と定義されている。
本発明の実施の形態2を、図11〜図21に基づいて説明する。
{rtshit0、rtshit1}=10:rtsbuf0[127:0]
{rtshit0、rtshit1}=01:rtsbuf1[127:0]
である。すなわち、セレクタ(1341)は、RTSバッファ0、RTSバッファ1のうち、ヒットしているRTSバッファの出力を選択する。
01:RTSバッファ0を更新
10:RTSバッファ1を更新
である。
{hit1、hit0、v1、v0}=1???→rtspnt[1:0]=10
{hit1、hit0、v1、v0}=01??→rtspnt[1:0]=01
{hit1、hit0、v1、v0}=000?→rtspnt[1:0]=10
{hit1、hit0、v1、v0}=0000→rtspnt[1:0]=01
上記以外 →rtspnt[1:0]=00
となる。なお、“?”は“don‘t care”を意味する。すなわち、まずヒットしているバッファを探し、ヒットしているバッファがない場合、次に無効なバッファを探すというアルゴリズムで更新するバッファを選択する。
10000000→000
?1000000→001
??100000→010
???10000→011
????1000→100
?????100→101
??????10→110
???????1→111
上記以外 →000
である。なお、“?”は“don‘t care”を意味する。
inst_sel[2:0]=000:ibuf[63:0]
inst_sel[2:0]=001:ibuf[79:16]
inst_sel[2:0]=010:ibuf[95:32]
inst_sel[2:0]=011:ibuf[111:48]
inst_sel[2:0]=100:ibuf[127:64]
inst_sel[2:0]=101:ibuf[143:80]
inst_sel[2:0]=110:ibuf[159:96]
inst_sel[2:0]=111:ibuf[175:112]
である。
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=1_111_1_1_1‥(1)
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=1_110_1_1_1‥(2)
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=1_101_1_1_1‥(3)
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=?_100_1_1_1‥(4)
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=?_011_1_1_1‥(5)
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=?_010_1_1_1‥(6)
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=?_001_1_1_1‥(7)
{ibvh、inst_sel[2:0]、jsror70、order_hit、index_hit}=?_000_1_1_1‥(8)
である。
pfack=1
である。
Claims (1)
- CPUと、メモリと、一旦前記CPUが前記メモリから読み出した、予め定められた数の命令およびデータからなる命令列を、将来前記CPUが再度読み出すことに備えてそれを保持するキャッシュと、を備えた情報処理装置であって、
前記キャッシュとして、サブルーチン復帰命令の復帰先の命令列を少なくとも1つ格納する復帰用キャッシュを備え、前記CPUが現在アクセス中の命令列を格納する現命令バッファを備え、前記現命令バッファに格納された命令列の中からサブルーチンへの分岐命令を検出すると、前記現命令バッファから前記復帰用キャッシュに命令列を転送し、
前記復帰用キャッシュが2つ以上のエントリを有する場合、前記現命令バッファに格納された命令列を前記復帰用キャッシュのどのエントリに転送するかの選択方法は、前記CPUに読み出されたことのあるエントリ、又は有効な命令列を格納していないエントリを選択し、
前記現命令バッファに格納される命令列の中に、サブルーチンからの復帰時に最初に実行される命令が含まれない場合は、前記現命令バッファに格納された命令列は前記復帰用キャッシュへ転送されないこと、を特徴とする情報処理装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004021207A JP4247132B2 (ja) | 2004-01-29 | 2004-01-29 | 情報処理装置 |
US11/046,453 US20050172110A1 (en) | 2004-01-29 | 2005-01-28 | Information processing apparatus |
US13/423,145 US8578135B2 (en) | 2004-01-29 | 2012-03-16 | Apparatus for calculating and prefetching a branch target address |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004021207A JP4247132B2 (ja) | 2004-01-29 | 2004-01-29 | 情報処理装置 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008215451A Division JP4739380B2 (ja) | 2008-08-25 | 2008-08-25 | 情報処理装置 |
JP2008299692A Division JP2009104614A (ja) | 2008-11-25 | 2008-11-25 | 情報処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005215946A JP2005215946A (ja) | 2005-08-11 |
JP4247132B2 true JP4247132B2 (ja) | 2009-04-02 |
Family
ID=34805604
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004021207A Expired - Lifetime JP4247132B2 (ja) | 2004-01-29 | 2004-01-29 | 情報処理装置 |
Country Status (2)
Country | Link |
---|---|
US (2) | US20050172110A1 (ja) |
JP (1) | JP4247132B2 (ja) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9317293B2 (en) | 2012-11-28 | 2016-04-19 | Qualcomm Incorporated | Establishing a branch target instruction cache (BTIC) entry for subroutine returns to reduce execution pipeline bubbles, and related systems, methods, and computer-readable media |
GB2509830B (en) * | 2013-02-11 | 2014-12-24 | Imagination Tech Ltd | Speculative load issue |
US20150254078A1 (en) * | 2014-03-07 | 2015-09-10 | Analog Devices, Inc. | Pre-fetch unit for microprocessors using wide, slow memory |
JP2017027479A (ja) * | 2015-07-24 | 2017-02-02 | 富士通株式会社 | データ読出し方法及び情報処理システム |
GB2542831B (en) | 2015-09-30 | 2018-05-30 | Imagination Tech Ltd | Fetch unit for predicting target for subroutine return instructions |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5146038A (ja) | 1974-10-18 | 1976-04-20 | Hitachi Ltd | Deetashorisochi |
US4714994A (en) * | 1985-04-30 | 1987-12-22 | International Business Machines Corp. | Instruction prefetch buffer control |
US4709324A (en) * | 1985-11-27 | 1987-11-24 | Motorola, Inc. | Data processor control unit having an interrupt service using instruction prefetch redirection |
JPH06274341A (ja) | 1993-03-17 | 1994-09-30 | Hitachi Ltd | マイクロコンピュータ |
JP3614207B2 (ja) | 1994-12-13 | 2005-01-26 | 株式会社ルネサステクノロジ | データ処理装置 |
JPH0991139A (ja) | 1995-09-28 | 1997-04-04 | Hitachi Ltd | 情報処理装置 |
US6341335B1 (en) | 1997-10-29 | 2002-01-22 | Hitachi, Ltd. | Information processing system for read ahead buffer memory equipped with register and memory controller |
JPH11232171A (ja) | 1997-10-29 | 1999-08-27 | Hitachi Ltd | 情報処理システム |
US6108773A (en) * | 1998-03-31 | 2000-08-22 | Ip-First, Llc | Apparatus and method for branch target address calculation during instruction decode |
US7134004B1 (en) | 1999-09-29 | 2006-11-07 | Fujitsu Limited | Processing device for buffering sequential and target sequences and target address information for multiple branch instructions |
US6910124B1 (en) * | 2000-05-02 | 2005-06-21 | International Business Machines Corporation | Apparatus and method for recovering a link stack from mis-speculation |
-
2004
- 2004-01-29 JP JP2004021207A patent/JP4247132B2/ja not_active Expired - Lifetime
-
2005
- 2005-01-28 US US11/046,453 patent/US20050172110A1/en not_active Abandoned
-
2012
- 2012-03-16 US US13/423,145 patent/US8578135B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2005215946A (ja) | 2005-08-11 |
US20050172110A1 (en) | 2005-08-04 |
US20120173850A1 (en) | 2012-07-05 |
US8578135B2 (en) | 2013-11-05 |
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