DE3688806D1 - Instruktionsprozessor. - Google Patents

Instruktionsprozessor.

Info

Publication number
DE3688806D1
DE3688806D1 DE8686106128T DE3688806T DE3688806D1 DE 3688806 D1 DE3688806 D1 DE 3688806D1 DE 8686106128 T DE8686106128 T DE 8686106128T DE 3688806 T DE3688806 T DE 3688806T DE 3688806 D1 DE3688806 D1 DE 3688806D1
Authority
DE
Germany
Prior art keywords
instruction processor
instruction
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686106128T
Other languages
English (en)
Other versions
DE3688806T2 (de
Inventor
Kazunori Kuriyama
Kenichi Wada
Akira Yamaoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3688806D1 publication Critical patent/DE3688806D1/de
Publication of DE3688806T2 publication Critical patent/DE3688806T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
DE86106128T 1985-05-07 1986-05-05 Instruktionsprozessor. Expired - Fee Related DE3688806T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60095444A JPH0752390B2 (ja) 1985-05-07 1985-05-07 命令処理装置

Publications (2)

Publication Number Publication Date
DE3688806D1 true DE3688806D1 (de) 1993-09-09
DE3688806T2 DE3688806T2 (de) 1994-01-05

Family

ID=14137860

Family Applications (1)

Application Number Title Priority Date Filing Date
DE86106128T Expired - Fee Related DE3688806T2 (de) 1985-05-07 1986-05-05 Instruktionsprozessor.

Country Status (4)

Country Link
US (1) US4954947A (de)
EP (1) EP0201833B1 (de)
JP (1) JPH0752390B2 (de)
DE (1) DE3688806T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5265220A (en) * 1986-12-23 1993-11-23 Nec Corporation Address control device for effectively controlling an address storing operation even when a request is subsequently cancelled
JP2690921B2 (ja) * 1987-12-25 1997-12-17 株式会社日立製作所 情報処理装置
US5522053A (en) * 1988-02-23 1996-05-28 Mitsubishi Denki Kabushiki Kaisha Branch target and next instruction address calculation in a pipeline processor
JPH0769808B2 (ja) * 1988-02-23 1995-07-31 三菱電機株式会社 データ処理装置
EP0402524B1 (de) * 1988-11-25 1996-10-02 Nec Corporation Mikrorechner, geeignet zur Schnellverarbeitung eines Verzweigungsbefehlskodes
JPH0795271B2 (ja) * 1989-06-20 1995-10-11 富士通株式会社 分岐命令実行装置
US5203002A (en) * 1989-12-27 1993-04-13 Wetzel Glen F System with a multiport memory and N processing units for concurrently/individually executing 2N-multi-instruction-words at first/second transitions of a single clock cycle
US5333288A (en) * 1990-02-23 1994-07-26 Nec Corporation Effective address pre-calculation type pipelined microprocessor
JP2922723B2 (ja) * 1992-06-29 1999-07-26 キヤノン株式会社 情報処理装置
JP2857600B2 (ja) * 1995-05-11 1999-02-17 松下電器産業株式会社 プロセッサ及びプログラム翻訳装置
US6385720B1 (en) * 1997-07-14 2002-05-07 Matsushita Electric Industrial Co., Ltd. Branch prediction method and processor using origin information, relative position information and history information
JP3606435B2 (ja) * 1999-09-29 2005-01-05 富士通株式会社 モードを変更する分岐命令を制御する命令処理装置および方法
JP2005259113A (ja) * 2004-02-12 2005-09-22 Ricoh Co Ltd プロセス編集装置、プロセス管理装置、プロセス編集プログラム、プロセス管理プログラム、記録媒体、プロセス編集方法及びプロセス管理方法
GB2464674C (en) * 2008-10-20 2013-04-03 Avdel Uk Ltd Blind fastener
US10514911B2 (en) * 2014-11-26 2019-12-24 International Business Machines Corporation Structure for microprocessor including arithmetic logic units and an efficiency logic unit

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4025771A (en) * 1974-03-25 1977-05-24 Hughes Aircraft Company Pipe line high speed signal processor
JPS6029126B2 (ja) * 1977-01-14 1985-07-09 株式会社日立製作所 デ−タ処理装置
JPS5440537A (en) * 1977-09-07 1979-03-30 Hitachi Ltd Pipeline control system
JPS5441641A (en) * 1977-09-09 1979-04-03 Hitachi Ltd Data processing system having data producing unit
JPS5478941A (en) * 1977-12-07 1979-06-23 Hitachi Ltd High speed operation system
US4325120A (en) * 1978-12-21 1982-04-13 Intel Corporation Data processing system
US4295193A (en) * 1979-06-29 1981-10-13 International Business Machines Corporation Machine for multiple instruction execution
JPS5621240A (en) * 1979-07-27 1981-02-27 Hitachi Ltd Information processor
JPS5927935B2 (ja) * 1980-02-29 1984-07-09 株式会社日立製作所 情報処理装置
JPS56129950A (en) * 1980-03-07 1981-10-12 Hitachi Ltd Information processor
JPS56149646A (en) * 1980-04-21 1981-11-19 Toshiba Corp Operation controller
CA1174370A (en) * 1980-05-19 1984-09-11 Hidekazu Matsumoto Data processing unit with pipelined operands
JPS6023378B2 (ja) * 1980-06-02 1985-06-07 株式会社日立製作所 情報処理装置
JPS5734253A (en) * 1980-08-09 1982-02-24 Fujitsu Ltd Brunch instruction controlling circuit
JPS5858653A (ja) * 1981-10-02 1983-04-07 Hitachi Ltd デ−タ処理装置
US4435756A (en) * 1981-12-03 1984-03-06 Burroughs Corporation Branch predicting computer
JPS58189739A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd デ−タ処理システム
US4594655A (en) * 1983-03-14 1986-06-10 International Business Machines Corporation (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions
JPS6017538A (ja) * 1983-07-11 1985-01-29 Hitachi Ltd 命令処理装置
JPS60178539A (ja) * 1984-02-24 1985-09-12 Fujitsu Ltd 情報処理装置におけるバイパス制御方式
JPS60204036A (ja) * 1984-03-28 1985-10-15 Hitachi Ltd デ−タ処理装置

Also Published As

Publication number Publication date
DE3688806T2 (de) 1994-01-05
JPH0752390B2 (ja) 1995-06-05
EP0201833A2 (de) 1986-11-20
US4954947A (en) 1990-09-04
EP0201833A3 (en) 1989-11-08
JPS61253541A (ja) 1986-11-11
EP0201833B1 (de) 1993-08-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee