KR880013224A - 반도체 소자 제조방법 - Google Patents

반도체 소자 제조방법 Download PDF

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Publication number
KR880013224A
KR880013224A KR1019880003805A KR880003805A KR880013224A KR 880013224 A KR880013224 A KR 880013224A KR 1019880003805 A KR1019880003805 A KR 1019880003805A KR 880003805 A KR880003805 A KR 880003805A KR 880013224 A KR880013224 A KR 880013224A
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layer
grow
reaction chamber
gaseous material
gaseous
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KR1019880003805A
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English (en)
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아더 요이스 브루스
다우슨 필립
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이반 밀러 레르너
엔.브이.필립스 글로아이람펜파브리켄
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Publication of KR880013224A publication Critical patent/KR880013224A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02387—Group 13/15 materials
    • H01L21/02395—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02463—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/02546—Arsenides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10S117/903—Dendrite or web or cage technique
    • Y10S117/904—Laser beam
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/048—Energy beam assisted EPI growth
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/065—Gp III-V generic compounds-processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/072—Heterojunctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/169—Vacuum deposition, e.g. including molecular beam epitaxy

Abstract

내용 없음

Description

반도체 소자 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도면은 분자 빔 애피택시를 실행하기 위해 공지된 형태(예를 들어 비리언 Gen II MBE 기계)의 장치의 개략도.

Claims (10)

  1. 기판상에 제 1 재질의 애피택셜층이 성장되도록 하기 위해 기판을 포함하고 있는 반응실내로 공급 수단을 통해 기체물질을 제공하는 단계와 제 1 층 위에 제 2 층의 애피택셜층이 성장되도록 반응실내로 공급 수단을 통해 기체물질의 소정주기공급을 변화시키는 스위칭 수단을 동작시키는 단계를 구비하는 반도체 소자 제조방법에 있어서, 제 2 층의 성장이 시작되기 전에 소정의 주기동안 제 1 층의 표면을 편평하도록 만들기 위해 제 1 층의 표면을 향하고 제 1 층의 표면을 복사 열 소스를 작동시켜 소정의 주기동안 제 1 층의 표면을 복사 형태로 가열하는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  2. 제 1 항에 있어서, 상기 소정의 주기동안 제 1층에 레이저 소스를 지향시켜 제 1층 표면을 복사 형태로 가열하는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  3. 제 2 항에 있어서, 상기 소정의 주기동안 레이저가 펄스를 발생 및 펄스 차단을 일으키는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  4. 제 1,2 또는 3 항에 있어서, 다음층의 성장이 시작되기 전에 층을 원자 수준으로 평활화 시키기 위해 기체물질의 공급이 공급수단을 통해 공급되는 것을 변화시키는 소정의 주기동안 각 층의 표면을 복사형태로 가열하기 위해 복사가열 소스를 작동시키는 것을 포함하여 교변상태의 제1 및 제2층을 성장시키는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  5. 제 1,2,3 또는 4 항에 있어서, 상기 방법은 반응실에서 대기압 이하의 압력을 유지시키는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  6. 제 5 항에 있어서, 반응실내에서 초진공 상태를 유지하는 단계와 분자의 빔을 지향시켜 반응실내에 기체물질 또는 기판을 향하여 반응실내로 원자 또는 이온을 주입시키는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  7. 선행하는 항중의 어느 한 항에 있어서, 기체 금속 유기 혼합물로서 기체물질의 최소한 일부를 유입시키는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  8. 제 6 또는 제7 항에 있어서, 층이 성장하도록 반응실내로 기체물질을 주입시켜 제1 및 제2층중의 최한 하나가 약 50nm 이하의 두께를 갖도록 하는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  9. 선행하는 항중의 어느 한 항에 있어서, 제 1 및 제 2층을 성장시키기 위해 기체물질을 주입하는 단계는 각 제 1층이 제1 Ⅲ-Ⅴ반도체 재질의 애피택셜층으로서 성장하고 각 제 2 층이 제2 Ⅲ-Ⅴ반도체 재질의 애피택셜층으로 성장하기 위해 Ⅲ족 및 Ⅴ족 원소를 구비하는 기체물질을 주입하는 단계를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
  10. 제 9 항에 있어서, 각 제 1 층을 성장시키기 위해 주입된 기체물질은 갈륨과 비소의 별도의 소스를 구비하며 각 제 2층을 성장시키기 위해 주입된 기체물질을 갈륨, 알루미늄 및 비소의 별도 소스를 구비하는 것을 특징으로 하는 반도체 소자 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880003805A 1987-04-06 1988-04-06 반도체 소자 제조방법 KR880013224A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8708153 1987-04-06
GB08708153A GB2204066A (en) 1987-04-06 1987-04-06 A method for manufacturing a semiconductor device having a layered structure

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US (1) US4843029A (ko)
EP (1) EP0286181B1 (ko)
JP (1) JPS63261832A (ko)
KR (1) KR880013224A (ko)
DE (1) DE3884033T2 (ko)
GB (1) GB2204066A (ko)

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Publication number Publication date
EP0286181A3 (en) 1991-03-20
GB8708153D0 (en) 1987-05-13
EP0286181A2 (en) 1988-10-12
JPS63261832A (ja) 1988-10-28
DE3884033D1 (de) 1993-10-21
EP0286181B1 (en) 1993-09-15
US4843029A (en) 1989-06-27
DE3884033T2 (de) 1994-04-07
GB2204066A (en) 1988-11-02

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