KR880006847A - Loopback circuit of modem - Google Patents

Loopback circuit of modem Download PDF

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Publication number
KR880006847A
KR880006847A KR860010236A KR860010236A KR880006847A KR 880006847 A KR880006847 A KR 880006847A KR 860010236 A KR860010236 A KR 860010236A KR 860010236 A KR860010236 A KR 860010236A KR 880006847 A KR880006847 A KR 880006847A
Authority
KR
South Korea
Prior art keywords
modem
processing unit
central processing
latches
address
Prior art date
Application number
KR860010236A
Other languages
Korean (ko)
Other versions
KR900004303B1 (en
Inventor
원진
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019860010236A priority Critical patent/KR900004303B1/en
Publication of KR880006847A publication Critical patent/KR880006847A/en
Application granted granted Critical
Publication of KR900004303B1 publication Critical patent/KR900004303B1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

내용 없음No content

Description

모뎀의 루우프 백 회로Loopback circuit of modem

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 전송선로에 연결된 모뎀 시스켐간의 블럭도.1 is a block diagram of modem systems connected to the transmission line.

제2도는 본 발명에 따른 회로도.2 is a circuit diagram according to the present invention.

제3도는 제2도의 루우프백회로용 스위치 구체회로 및 스위치 상태도.3 is a switch concrete circuit and a switch state diagram for the loopback circuit of FIG.

Claims (1)

호스트 컴퓨터 및 터미날측인 DTE(1, 5)와, 모뎀집적회로(6, 9)와, 공중선(3)과 연결되며 전송라인의 데이타 송수신을 제어하는 DAA(7, 8)를 구비한 모뎀 시스템에 있어서, 지능형에 따라 테스트 기능별 루우프 형성 데이타를 출력하는 중앙처리장치부(10, 100)와, 상기 중앙처리장치부(10, 100)의 출력 어드레스 및 제어신호를 디코딩하는 어드레스 디코딩 래치부(11,110)와, 상기 중앙처리장치부(10,100)의 출력 데이타를 상기 어드레스 디코딩 래치부(11, 110)의 출력신호에 따라 래치하는 래치(12, 120)와, 상기 래치(12, 120)의 출력에 따라 루우프를 형성하여 지능별로 테스트 할 수 있도록 제1-8스위치(S1-S₄,S1'-S₄')를 제어할 수 있도록 구성함을 특징으로 하는 모뎀의 루우프 백회로.Modem system having DTE (1, 5) on the host computer and terminal side, modem integrated circuit (6, 9), DAA (7, 8) connected to aerial line (3) and controlling data transmission and reception of transmission line In the present invention, the central processing unit (10, 100) for outputting the loop forming data for each test function in accordance with the intelligent, the address decoding latch (11, 110) for decoding the output address and the control signal of the central processing unit (10, 100) and Latches 12 and 120 for latching output data of the central processing unit 10 and 100 according to output signals of the address decoding latch units 11 and 110 and loops according to the outputs of the latches 12 and 120. The loopback circuit of the modem, characterized in that it is configured to control the 1-8 switches (S 1 -S₄, S 1 '-S₄') to test by intelligence. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019860010236A 1986-11-30 1986-11-30 Test circuit for modem KR900004303B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860010236A KR900004303B1 (en) 1986-11-30 1986-11-30 Test circuit for modem

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860010236A KR900004303B1 (en) 1986-11-30 1986-11-30 Test circuit for modem

Publications (2)

Publication Number Publication Date
KR880006847A true KR880006847A (en) 1988-07-25
KR900004303B1 KR900004303B1 (en) 1990-06-20

Family

ID=19253753

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860010236A KR900004303B1 (en) 1986-11-30 1986-11-30 Test circuit for modem

Country Status (1)

Country Link
KR (1) KR900004303B1 (en)

Also Published As

Publication number Publication date
KR900004303B1 (en) 1990-06-20

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