KR880008581A - Multifunctional Transmission Control Circuit - Google Patents

Multifunctional Transmission Control Circuit Download PDF

Info

Publication number
KR880008581A
KR880008581A KR860011634A KR860011634A KR880008581A KR 880008581 A KR880008581 A KR 880008581A KR 860011634 A KR860011634 A KR 860011634A KR 860011634 A KR860011634 A KR 860011634A KR 880008581 A KR880008581 A KR 880008581A
Authority
KR
South Korea
Prior art keywords
con
connector
tdi
control circuit
transmission
Prior art date
Application number
KR860011634A
Other languages
Korean (ko)
Other versions
KR900007677B1 (en
Inventor
박희덕
Original Assignee
한형수
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 한형수, 삼성전자 주식회사 filed Critical 한형수
Priority to KR1019860011634A priority Critical patent/KR900007677B1/en
Publication of KR880008581A publication Critical patent/KR880008581A/en
Application granted granted Critical
Publication of KR900007677B1 publication Critical patent/KR900007677B1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

내용 없음.No content.

Description

다기능 전송제어회로Multifunctional Transmission Control Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 회로도이다.1 is a circuit diagram of the present invention.

Claims (1)

마이크로 프로세서(MP)의 송신출력단자(TDO)에 RS-232C 방식의 라인드라이브(U1)를 통해 콘넥터(CON)의 RS-232C 방식의 송신입력단자(TDI1)와, RS-422 방식의 라인드라이브(U7)를 거쳐 콘넥터(CON)의 RS-422 방식의 송신 입력단자(TDI2) 및, 전류루우프방식의 옵토커플러(U9)를 거쳐 콘넥터(CON)의 전류루우프방식의 송신입력단자(TDI3)가 각각 병렬로 연결되고, 상기 콘넥터(CON)의 각 방식에 따른 수신출력단자(RDO1-RDO3)에 라인리시브(U3)(U6)와 옵토커플러(U10)를 통해 앤드게이트(AND)의 입력단자가 각각 연결되며, 상기 앤드 게이트(AND)의 출력단자에 마이크로 프로세서(MP)의 수신입력단자(RDI)가 연결되며, 상기 옵토커플러(U10)에 마이크로 프로세서(MP)의 신호에 의해 제어되는 제어단자(C／L)가 연결되어 컴퓨터의 기종에 관계없이 모든 방식의 데이터를 전송시킬 수 있는 것을 특징으로 하는 다기능 전송 제어회로.RS-232C transmission input terminal (TDI 1 ) of connector (CON) through RS-232C transmission line (U 1 ) to the transmission output terminal (TDO) of the microprocessor (MP) and RS-422 system RS-422 transmission input terminal (TDI 2 ) of connector (CON) via line drive (U 7 ) and current loop transmission input of connector (CON) via current loop type optocoupler (U 9 ) The terminals TDI 3 are connected in parallel, respectively, and the line receivers U 3 and U 6 and the optocouplers U 10 are connected to the reception output terminals RDO 1 to RDO 3 according to each method of the connector CON. Input terminals of the AND gate AND are connected to each other, a receiving input terminal RDI of the microprocessor MP is connected to an output terminal of the AND gate AND, and a micro to the optocoupler U 10 . The control terminal C / L controlled by the signal of the processor MP is connected to transfer all types of data regardless of the type of computer. Number of multi-functional transfer control circuit, characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019860011634A 1986-12-31 1986-12-31 Arrangement for selecting variable communication systems KR900007677B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860011634A KR900007677B1 (en) 1986-12-31 1986-12-31 Arrangement for selecting variable communication systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860011634A KR900007677B1 (en) 1986-12-31 1986-12-31 Arrangement for selecting variable communication systems

Publications (2)

Publication Number Publication Date
KR880008581A true KR880008581A (en) 1988-08-31
KR900007677B1 KR900007677B1 (en) 1990-10-18

Family

ID=19254630

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860011634A KR900007677B1 (en) 1986-12-31 1986-12-31 Arrangement for selecting variable communication systems

Country Status (1)

Country Link
KR (1) KR900007677B1 (en)

Also Published As

Publication number Publication date
KR900007677B1 (en) 1990-10-18

Similar Documents

Publication Publication Date Title
EP0256861B1 (en) Flip-flop circuit
KR980007258A (en) I²C communication device using general purpose microcomputer
KR860001482A (en) IC device
ES8401271A1 (en) Data transmission system.
KR880008581A (en) Multifunctional Transmission Control Circuit
KR830008221A (en) Numerical Control Device
JPS57194647A (en) Optical communication system
KR940006657Y1 (en) Selecting circuit of information i/o
SU1088145A1 (en) Device for receiving and transmitting information
KR920009115A (en) Data Bit Rate Selection Circuit
JPS57168324A (en) Bus control circuit
JPS6436267A (en) Facsimile transmitter
SU1396255A1 (en) Device for shaping relative bipulse signal
KR950003902Y1 (en) Port interface circuit using in two or more ways
JPS56119557A (en) Communication mode switching system
SU1314347A1 (en) Interface
SU902294A1 (en) Device for shaping quasiternary sequence
SU822225A2 (en) Signal receiver
KR880001124A (en) Communication information security
JPS5526766A (en) Terminal-circuit-side transmitter circuit of repeater
KR960002041A (en) Interprocessor Communication
JPS5567820A (en) Optical bus control unit
KR880008651A (en) Videotex Combined Teletext Receiver
KR880006847A (en) Loopback circuit of modem
JPS57117005A (en) Output card

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20020930

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee