KR880008571A - Document communication data transmission / reception circuit - Google Patents

Document communication data transmission / reception circuit Download PDF

Info

Publication number
KR880008571A
KR880008571A KR860010272A KR860010272A KR880008571A KR 880008571 A KR880008571 A KR 880008571A KR 860010272 A KR860010272 A KR 860010272A KR 860010272 A KR860010272 A KR 860010272A KR 880008571 A KR880008571 A KR 880008571A
Authority
KR
South Korea
Prior art keywords
output device
input
terminal
phase
modem
Prior art date
Application number
KR860010272A
Other languages
Korean (ko)
Other versions
KR890004887B1 (en
Inventor
김용근
Original Assignee
한형수
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 한형수, 삼성전자 주식회사 filed Critical 한형수
Priority to KR1019860010272A priority Critical patent/KR890004887B1/en
Publication of KR880008571A publication Critical patent/KR880008571A/en
Application granted granted Critical
Publication of KR890004887B1 publication Critical patent/KR890004887B1/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L17/00Apparatus or local circuits for transmitting or receiving codes wherein each character is represented by the same number of equal-length code elements, e.g. Baudot code
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

내용 없음.No content.

Description

문서통신 데이터 송수신회로Document communication data transmission / reception circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 회로블록도.1 is a circuit block diagram of the present invention.

Claims (1)

시스템본체의 중앙처리장치(1) 및 기억장치(2)에 랫치회로(3)(4) 및 버스트랜시버(5)를 매개하여 연결된 랩콘트롤러(6)의 전송데이터출력단(RTS)(TD)과 입력단(CTS)(RD)(TC)(RC)에는 3상버퍼(7)(8)를 매개하여 콘트롤러가 내장된 모뎀(9)을 연결하고, 상기 모뎀(9)위 출력단(DSR)에는 3상버퍼(10)를 매개하여 병렬입출력장치(11)의 입력단(A1)을 연결하며, 상기 3상버퍼(7)(8)(10)와 모뎀(9)의 연결점에는 3상버퍼(12)(13)를 매개하여 명령신호 송수신용 직렬입출력장치(14)를 연결하고 상기 병렬입출력장치(11)의 출력단(A3)(A4)에는 상기 3상버퍼(7)(8)(10)와 3상버퍼(12)(13)의 제어신호단(S)을 연결하며, 상기 병렬입출력장치(11)와 직렬입출력장치(14)에는 상기 중앙처리장치(1)를 연결하여서 명령모우드와 데이터 통신 모우드를 절환하도록 구성된 전송데이터 송수신회로.The transmission data output terminal (RTS) (TD) of the lap controller 6 connected to the central processing unit 1 and the storage unit 2 of the system body via the latch circuits 3, 4 and the bus transceiver 5; A modem (9) with a built-in controller is connected to the input terminal (CTS) (RD) (TC) (RC) via a three-phase buffer (7) (8), and an output terminal (DSR) on the modem (3) An input terminal A 1 of the parallel input / output device 11 is connected via an upper buffer 10, and a three-phase buffer 12 is connected to a connection point between the three-phase buffers 7, 8, 10, and the modem 9. Connects the serial input / output device 14 for command signal transmission / reception via the (13) and outputs the three-phase buffers (7) (8) (10) to the output terminals (A 3 ) (A 4 ) of the parallel input / output device (11). ) And the control signal terminal (S) of the three-phase buffer (12) (13), the parallel input / output device (11) and the serial input / output device (14) by connecting the central processing unit (1) and the command mode and Transmission data transmission and reception circuit configured to switch the data communication mode. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019860010272A 1986-12-02 1986-12-02 Data transmission system with link access protocol controller and modem KR890004887B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019860010272A KR890004887B1 (en) 1986-12-02 1986-12-02 Data transmission system with link access protocol controller and modem

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019860010272A KR890004887B1 (en) 1986-12-02 1986-12-02 Data transmission system with link access protocol controller and modem

Publications (2)

Publication Number Publication Date
KR880008571A true KR880008571A (en) 1988-08-31
KR890004887B1 KR890004887B1 (en) 1989-11-30

Family

ID=19253773

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860010272A KR890004887B1 (en) 1986-12-02 1986-12-02 Data transmission system with link access protocol controller and modem

Country Status (1)

Country Link
KR (1) KR890004887B1 (en)

Also Published As

Publication number Publication date
KR890004887B1 (en) 1989-11-30

Similar Documents

Publication Publication Date Title
KR880001154A (en) Remote control system
KR910010335A (en) Interface circuit
KR880008571A (en) Document communication data transmission / reception circuit
JPS6464056A (en) Information processor for connecting serial interface bus
JPS6016984Y2 (en) interface circuit
KR940006657Y1 (en) Selecting circuit of information i/o
KR910002458Y1 (en) Adaptor apparatus for using in rs-232c and rs-422 of each
KR890002141Y1 (en) 32-bit data signal transmission device
JPS6476251A (en) Data bus terminal equipment
SU1621143A1 (en) Ik-type flip-flop
KR970013910A (en) Computer with PnP Modem with Plug and Play Capability for Modem Reset in Modem Down due to External Communication Failure
JPS5523550A (en) Interface system
KR850004823A (en) Signal control circuit for data terminals
KR880008651A (en) Videotex Combined Teletext Receiver
KR880005523A (en) Data Conversion Cable Device
KR880006847A (en) Loopback circuit of modem
KR880014441A (en) Digital input / output control module device of programmable controller
KR890000958A (en) Card Reader for Terminal
KR900011657A (en) Elevator signal transmitter
KR920020884A (en) Bus occupancy arbitrator
KR920010447A (en) Data loss prevention circuit between CPUs using dual port RAM
KR910003968A (en) Transmission and reception data collision detection circuit
KR890017905A (en) Personal computer's synchronous / asynchronous modem
KR930008640A (en) Interrupt Circuit of Control System
KR930008646A (en) Personal computer serial communication interface

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20021031

Year of fee payment: 14

LAPS Lapse due to unpaid annual fee