KR880014441A - Digital input / output control module device of programmable controller - Google Patents

Digital input / output control module device of programmable controller Download PDF

Info

Publication number
KR880014441A
KR880014441A KR870005340A KR870005340A KR880014441A KR 880014441 A KR880014441 A KR 880014441A KR 870005340 A KR870005340 A KR 870005340A KR 870005340 A KR870005340 A KR 870005340A KR 880014441 A KR880014441 A KR 880014441A
Authority
KR
South Korea
Prior art keywords
terminal
output terminal
input
input terminal
output
Prior art date
Application number
KR870005340A
Other languages
Korean (ko)
Other versions
KR900002365B1 (en
Inventor
김광석
Original Assignee
안시환
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 안시환, 삼성전자 주식회사 filed Critical 안시환
Priority to KR1019870005340A priority Critical patent/KR900002365B1/en
Publication of KR880014441A publication Critical patent/KR880014441A/en
Application granted granted Critical
Publication of KR900002365B1 publication Critical patent/KR900002365B1/en

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/054—Input/output
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/11—Plc I-O input output
    • G05B2219/1105—I-O
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/11—Plc I-O input output
    • G05B2219/1157—I-O used either as input or as output

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

내용 없음No content

Description

프로그래머블 콘트롤러의 디지탈 입/출력제어 모듈장치Digital input / output control module device of programmable controller

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본고안의 블럭 구성도.1 is a block diagram of the present invention.

Claims (1)

어드레스 지정용 스위치(1)에 버퍼(2)의 입력단을 통하여 상기 버퍼(2)의 출력단과 중앙처리장치(CUP)(5) 및 메모리(9)는 각각 데이터버스(50)의 입력단에 연결하고, 상기 데이터버스(50)의 출력단에는 직렬통신부(3)의 입력단을 연결하고 그의 직렬 통신부(3)의 출력단에는 RS-232C 전압 레벨변환기(4)의 입력단을 연결하고 RS-232C 전압 레벨변환기(4) 출력단에는 프로그래머블 콘트롤러(PC)의 주 컴퓨터(20)를 연결함과 더불어 상기 데이터버스(50)의 출력단에 디코더회로부(6)를 통하여 그의 디코더회로부(6)의 출력단에는 멀티플랙스(10)의 칩선택신호 단자(CS)와 디코더+래치부(7)의 칩선택신호단자(CS)를 각각 연결하고, 그의 디코더+래치부(7)의 출력단에는 포토커플러+릴레이(8)의 입력단을 연결하고 상기 포토커플러+릴레이(8) 출력단에는 디지탈출력(30)을 연결함과 더불어 멀티플랙스(10)의 입력단에는 포토커플러(11)의 출력단을 연결하고 상기 포토커플러(11)의 입력단에는 디지탈 입력(40)을 연결하여 구성됨을 특징으로 하는 프로그래머블 콘트롤러의 디지탈 입/출력 제어모듈장치.The output terminal of the buffer 2, the central processing unit (CUP) 5 and the memory 9 are connected to the input terminal of the data bus 50 through the input terminal of the buffer 2 to the addressing switch 1, respectively. Connect the input terminal of the serial communication unit 3 to the output terminal of the data bus 50, and the input terminal of the RS-232C voltage level converter 4 to the output terminal of the serial communication unit 3, and connect the RS-232C voltage level converter ( 4) The main terminal 20 of the programmable controller PC is connected to the output terminal, and the multiplex 10 is connected to the output terminal of the decoder circuit unit 6 through the decoder circuit unit 6 at the output terminal of the data bus 50. The chip select signal terminal CS and the chip select signal terminal CS of the decoder + latch unit 7 are respectively connected, and the input terminal of the photocoupler + relay 8 is connected to the output terminal of the decoder + latch unit 7. And a digital output 30 connected to the photocoupler + relay 8 output terminal. The digital input / output control module of the programmable controller, characterized in that the input terminal of the blow multiplex 10 is connected to the output terminal of the photo coupler 11, and the input terminal of the photo coupler 11 is connected to the digital input 40. Device. ※ 참고사항：최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870005340A 1987-05-28 1987-05-28 Control apparatus of digital input or output KR900002365B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870005340A KR900002365B1 (en) 1987-05-28 1987-05-28 Control apparatus of digital input or output

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870005340A KR900002365B1 (en) 1987-05-28 1987-05-28 Control apparatus of digital input or output

Publications (2)

Publication Number Publication Date
KR880014441A true KR880014441A (en) 1988-12-23
KR900002365B1 KR900002365B1 (en) 1990-04-12

Family

ID=19261725

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870005340A KR900002365B1 (en) 1987-05-28 1987-05-28 Control apparatus of digital input or output

Country Status (1)

Country Link
KR (1) KR900002365B1 (en)

Also Published As

Publication number Publication date
KR900002365B1 (en) 1990-04-12

Similar Documents

Publication Publication Date Title
KR850008017A (en) CMOS input / output circuit
KR900005702A (en) Programmable Input / Output Circuits and Programmable Logic Devices
KR880001154A (en) Remote control system
KR880003252A (en) Microprocessor
KR860001482A (en) IC device
KR960042413A (en) Data processing system
KR880014441A (en) Digital input / output control module device of programmable controller
KR920015736A (en) Semiconductor integrated circuit
KR830008221A (en) Numerical Control Device
JPS56110125A (en) Data processing device
KR960026651A (en) Fusing system
KR880006586A (en) Analog input / output module of programmable controller
KR890002141Y1 (en) 32-bit data signal transmission device
KR880700606A (en) System processor interface unit
JPS5523550A (en) Interface system
KR910001354A (en) Electronic time shell fuser setter circuit (I)
KR880005802A (en) Teletext secret page information signal sorting circuit
JPS6476251A (en) Data bus terminal equipment
KR850005108A (en) Digital Device Reliability Improvement Inspection System
KR880008571A (en) Document communication data transmission / reception circuit
KR880008531A (en) Power on / off test device using micro processor
KR960028628A (en) Speed matching device of common line signal device
JPS6418854A (en) Address converting circuit for picture memory
KR920022109A (en) Terminal speed automatic recognition circuit
KR850005113A (en) 4-wire keyboard communication method

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20000330

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee