KR870004579A - 공진터널 트랜지스터를 이용한 3치 논리회로 - Google Patents

공진터널 트랜지스터를 이용한 3치 논리회로

Info

Publication number
KR870004579A
KR870004579A KR1019860008450A KR860008450A KR870004579A KR 870004579 A KR870004579 A KR 870004579A KR 1019860008450 A KR1019860008450 A KR 1019860008450A KR 860008450 A KR860008450 A KR 860008450A KR 870004579 A KR870004579 A KR 870004579A
Authority
KR
South Korea
Prior art keywords
tri
logic circuit
valued logic
tunnel transistor
resonant tunnel
Prior art date
Application number
KR1019860008450A
Other languages
English (en)
Other versions
KR900008438B1 (ko
Inventor
나오끼 요꼬야마
마사오 다구찌
Original Assignee
후지쓰 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쓰 가부시끼가이샤 filed Critical 후지쓰 가부시끼가이샤
Publication of KR870004579A publication Critical patent/KR870004579A/ko
Application granted granted Critical
Publication of KR900008438B1 publication Critical patent/KR900008438B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16—ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16L—PIPES; JOINTS OR FITTINGS FOR PIPES; SUPPORTS FOR PIPES, CABLES OR PROTECTIVE TUBING; MEANS FOR THERMAL INSULATION IN GENERAL
    • F16L55/00—Devices or appurtenances for use in, or in connection with, pipes or pipe systems
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/39—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using thyristors or the avalanche or negative resistance type, e.g. PNPN, SCR, SCS, UJT
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/29—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator multistable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/36—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of semiconductors, not otherwise provided for
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/561—Multilevel memory cell aspects
    • G11C2211/5614—Multilevel memory cell comprising negative resistance, quantum tunneling or resonance tunneling elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Nanotechnology (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Bipolar Transistors (AREA)
  • Logic Circuits (AREA)
KR1019860008450A 1985-10-09 1986-10-08 공진터널 트랜지스터를 이용한 3치 논리회로 KR900008438B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60223690A JPS6284621A (ja) 1985-10-09 1985-10-09 ３値論理回路
JP60-223690 1985-10-09

Publications (2)

Publication Number Publication Date
KR870004579A true KR870004579A (ko) 1987-05-11
KR900008438B1 KR900008438B1 (ko) 1990-11-20

Family

ID=16802118

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860008450A KR900008438B1 (ko) 1985-10-09 1986-10-08 공진터널 트랜지스터를 이용한 3치 논리회로

Country Status (5)

Country Link
US (1) US4956681A (ko)
EP (1) EP0220020B1 (ko)
JP (1) JPS6284621A (ko)
KR (1) KR900008438B1 (ko)
DE (1) DE3685928T2 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0611056B2 (ja) * 1985-12-03 1994-02-09 富士通株式会社 高速半導体装置
US4907196A (en) * 1987-04-28 1990-03-06 Fujitsu Limited Semiconductor memory device using resonant-tunneling transistor
JP2588590B2 (ja) * 1988-07-20 1997-03-05 富士通株式会社 半導体記憶装置
EP0436089A3 (en) * 1989-12-19 1992-08-05 International Business Machines Corporation Superlattice multistate circuits
JPH03231320A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp マイクロコンピュータシステム
US5128894A (en) * 1990-09-28 1992-07-07 University Of Maryland Multi-value memory cell using resonant tunnelling diodes
JP3429821B2 (ja) * 1992-11-04 2003-07-28 テキサス インスツルメンツ インコーポレイテツド 多機能共鳴トンネリング論理ゲート
US5500817A (en) * 1993-01-21 1996-03-19 Micron Technology, Inc. True tristate output buffer and a method for driving a potential of an output pad to three distinct conditions

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3089039A (en) * 1960-05-25 1963-05-07 Abraham George Multistable circuit employing devices in cascade connection to produce a composite voltage-current characteristic with a plurality of negative resistance regions
US3155845A (en) * 1961-12-29 1964-11-03 Ibm Three level converter
US3660678A (en) * 1971-02-05 1972-05-02 Ibm Basic ternary logic circuits
US3996484A (en) * 1975-09-05 1976-12-07 The United States Of America As Represented By The Secretary Of The Navy Interactive negative resistance multiple-stable state device
DE2607940A1 (de) * 1976-02-27 1977-09-08 Max Planck Gesellschaft Mehrschichtiges halbleiterbauelement
JPS6158268A (ja) * 1984-08-30 1986-03-25 Fujitsu Ltd 高速半導体装置

Also Published As

Publication number Publication date
US4956681A (en) 1990-09-11
EP0220020B1 (en) 1992-07-08
JPH0312488B2 (ko) 1991-02-20
EP0220020A2 (en) 1987-04-29
EP0220020A3 (en) 1988-09-07
KR900008438B1 (ko) 1990-11-20
JPS6284621A (ja) 1987-04-18
DE3685928T2 (de) 1993-03-04
DE3685928D1 (de) 1992-08-13

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Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee