DE3573970D1 - Complementary bi-mis gate circuit - Google Patents

Complementary bi-mis gate circuit

Info

Publication number
DE3573970D1
DE3573970D1 DE8585107427T DE3573970T DE3573970D1 DE 3573970 D1 DE3573970 D1 DE 3573970D1 DE 8585107427 T DE8585107427 T DE 8585107427T DE 3573970 T DE3573970 T DE 3573970T DE 3573970 D1 DE3573970 D1 DE 3573970D1
Authority
DE
Germany
Prior art keywords
complementary
gate circuit
mis gate
mis
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8585107427T
Other languages
English (en)
Inventor
Tetsu Tanizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP59130438A external-priority patent/JPS619015A/ja
Priority claimed from JP59198811A external-priority patent/JPS6175618A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3573970D1 publication Critical patent/DE3573970D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0013Arrangements for reducing power consumption in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425Multistate logic
    • H03K19/09429Multistate logic one of the states being the high impedance or floating state
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
DE8585107427T 1984-06-25 1985-06-14 Complementary bi-mis gate circuit Expired DE3573970D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59130438A JPS619015A (ja) 1984-06-25 1984-06-25 相補形ゲ−ト回路
JP59198811A JPS6175618A (ja) 1984-09-21 1984-09-21 相補形BiMIS3ステ−トゲ−ト回路

Publications (1)

Publication Number Publication Date
DE3573970D1 true DE3573970D1 (de) 1989-11-30

Family

ID=26465571

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585107427T Expired DE3573970D1 (de) 1984-06-25 1985-06-14 Complementary bi-mis gate circuit

Country Status (4)

Country Link
US (1) US4751410A (de)
EP (1) EP0172350B1 (de)
KR (1) KR900000830B1 (de)
DE (1) DE3573970D1 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0258808B1 (de) * 1986-08-29 1993-02-24 Mitsubishi Denki Kabushiki Kaisha Integrierte komplementäre MOS-Schaltung
JP2585599B2 (ja) * 1987-06-05 1997-02-26 株式会社日立製作所 出力インタ−フエ−ス回路
US4810903A (en) * 1987-12-14 1989-03-07 Motorola, Inc. BICMOS driver circuit including submicron on chip voltage source
US4897564A (en) * 1988-12-27 1990-01-30 International Business Machines Corp. BICMOS driver circuit for high density CMOS logic circuits
DE3904901A1 (de) * 1989-02-17 1990-08-23 Texas Instruments Deutschland Integrierte gegentakt-ausgangsstufe
JPH02238712A (ja) * 1989-03-13 1990-09-21 Toshiba Corp 出力バッファ回路
JPH03156967A (ja) * 1989-11-15 1991-07-04 Toshiba Micro Electron Kk 出力回路
US5043602A (en) * 1990-03-26 1991-08-27 Motorola, Inc. High speed logic circuit with reduced quiescent current
IT1239988B (it) * 1990-03-30 1993-11-27 Sgs Thomson Microelectronics Stadio d'uscita dati,del tipo cosiddetto buffer,a ridotto rumore e per circuiti logici di tipo cmos
US5218239A (en) * 1991-10-03 1993-06-08 National Semiconductor Corporation Selectable edge rate cmos output buffer circuit
JP2882163B2 (ja) * 1992-02-26 1999-04-12 日本電気株式会社 比較器
US5245230A (en) * 1992-03-06 1993-09-14 Ohri Kul B Low substrate injection n-channel output stage
KR940007954B1 (ko) * 1992-03-06 1994-08-29 삼성전자 주식회사 BiCMOS 구동회로
US5568062A (en) * 1995-07-14 1996-10-22 Kaplinsky; Cecil H. Low noise tri-state output buffer
KR970055534A (ko) * 1995-12-01 1997-07-31 데이빗 엘. 스미쓰 제어되는 전이 시간 구동 회로를 포함한 집적 회로
JP2004104642A (ja) * 2002-09-12 2004-04-02 Rohm Co Ltd トランジスタ出力回路、トランジスタ出力回路を含む半導体装置及び、そのトランジスタ出力回路を備えたスイッチング電源装置
FR2849536B1 (fr) * 2002-12-27 2007-02-23 St Microelectronics Sa Circuit d'interface de fourniture de tension
US20060261406A1 (en) * 2005-05-18 2006-11-23 Yijian Chen Vertical integrated-gate CMOS device and its fabrication process
US7706113B1 (en) * 2007-01-29 2010-04-27 Integrated Device Technology, Inc. Electrical overstress (EOS) and electrostatic discharge (ESD) protection circuit and method of use

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3631528A (en) * 1970-08-14 1971-12-28 Robert S Green Low-power consumption complementary driver and complementary bipolar buffer circuits
US3879619A (en) * 1973-06-26 1975-04-22 Ibm Mosbip switching circuit
US4103188A (en) * 1977-08-22 1978-07-25 Rca Corporation Complementary-symmetry amplifier
US4329600A (en) * 1979-10-15 1982-05-11 Rca Corporation Overload protection circuit for output driver
US4347445A (en) * 1979-12-31 1982-08-31 Exxon Research And Engineering Co. Floating hybrid switch
JPS6062239A (ja) * 1983-09-14 1985-04-10 Oki Electric Ind Co Ltd 三値入力回路

Also Published As

Publication number Publication date
KR860000719A (ko) 1986-01-30
US4751410A (en) 1988-06-14
EP0172350B1 (de) 1989-10-25
KR900000830B1 (ko) 1990-02-17
EP0172350A1 (de) 1986-02-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee